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-rw-r--r--spd/lp5/set-1/spd-1.hex4
-rw-r--r--spd/lp5/set-1/spd-2.hex4
-rw-r--r--spd/lp5/set-1/spd-3.hex4
-rw-r--r--util/spd_tools/src/spd_gen/lp5.go46
4 files changed, 42 insertions, 16 deletions
diff --git a/spd/lp5/set-1/spd-1.hex b/spd/lp5/set-1/spd-1.hex
index 0ac396bd3b00..ccc9107aab85 100644
--- a/spd/lp5/set-1/spd-1.hex
+++ b/spd/lp5/set-1/spd-1.hex
@@ -1,11 +1,11 @@
23 11 13 0E 85 19 95 18 00 40 00 00 02 02 00 00
-00 00 0A 00 00 00 00 00 AA 00 90 A8 90 90 06 C0
+00 00 03 00 00 00 00 00 2B 00 90 A8 90 90 06 C0
03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 B9 00 C1 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/spd/lp5/set-1/spd-2.hex b/spd/lp5/set-1/spd-2.hex
index 33da5d70be33..69a5fb54f23d 100644
--- a/spd/lp5/set-1/spd-2.hex
+++ b/spd/lp5/set-1/spd-2.hex
@@ -1,11 +1,11 @@
23 11 13 0E 85 19 B5 18 00 40 00 00 0A 02 00 00
-00 00 0A 00 00 00 00 00 AA 00 90 A8 90 90 06 C0
+00 00 03 00 00 00 00 00 2B 00 90 A8 90 90 06 C0
03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 B9 00 C1 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/spd/lp5/set-1/spd-3.hex b/spd/lp5/set-1/spd-3.hex
index b1893db69b6c..8090f06fdcc5 100644
--- a/spd/lp5/set-1/spd-3.hex
+++ b/spd/lp5/set-1/spd-3.hex
@@ -1,11 +1,11 @@
23 11 13 0E 86 21 95 18 00 40 00 00 02 02 00 00
-00 00 0A 00 00 00 00 00 AA 00 90 A8 90 C0 08 60
+00 00 03 00 00 00 00 00 2B 00 90 A8 90 C0 08 60
04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 B9 00 C1 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/util/spd_tools/src/spd_gen/lp5.go b/util/spd_tools/src/spd_gen/lp5.go
index c8bcaf5b2366..060cb2ad69b5 100644
--- a/util/spd_tools/src/spd_gen/lp5.go
+++ b/util/spd_tools/src/spd_gen/lp5.go
@@ -44,7 +44,7 @@ type LP5DensityParams struct {
}
type LP5SpeedParams struct {
- TCKMinPs int
+ defaultTCKMinPs int
MaxCASLatency int
}
@@ -69,6 +69,7 @@ type LP5Set struct {
optionalFeatures byte
otherOptionalFeatures byte
busWidthEncoding byte
+ speedToTCKMinPs map[int]int
}
/* ------------------------------------------------------------------------------------------ */
@@ -194,6 +195,19 @@ var LP5SetInfo = map[int]LP5Set{
* Set to 0x01.
*/
busWidthEncoding: 0x01,
+ /*
+ * TCKMinPs:
+ * LPDDR5 has two clocks: the command/address clock (CK) and the data clock (WCK). They are
+ * related by the WCK:CK ratio, which can be either 4:1 or 2:1. On ADL, 4:1 is used.
+ * For ADL, the MRC expects the tCKmin to encode the CK cycle time.
+ * tCKmin = 1 / CK rate
+ * = 1 / (WCK rate / WCK:CK)
+ * = 1 / (speed grade / 2 / WCK:CK) // "double data rate"
+ */
+ speedToTCKMinPs: map[int]int{
+ 6400 : 1250, /* 1 / (6400 / 2 / 4) */
+ 5500 : 1455, /* 1 / (5500 / 2 / 4) */
+ },
},
1: {
SPDRevision: LP5SPDValueRevision1_1,
@@ -346,23 +360,20 @@ var LP5BankArchToSPDEncoding = map[int]LP5BankArchParams{
/*
* TCKMinPs:
- * LPDDR5 has two clocks: the command/address clock (CK) and the data clock (WCK). They are
- * related by the WCK:CK ratio, which can be either 4:1 or 2:1. On ADL, 4:1 is used.
- * For ADL, the MRC expects the tCKmin to encode the CK period. This is calculated as:
- * tCKmin = 1 / CK rate
- * = 1 / (WCK rate / WCK:CK)
- * = 1 / (speed grade / 2 / WCK:CK) // "double data rate"
+ * Data sheets recommend encoding the the WCK cycle time.
+ * tCKmin = 1 / WCK rate
+ * = 1 / (speed grade / 2) // "double data rate"
*
* MaxCASLatency:
* From Table 220 of JESD209-5B, using a 4:1 WCK:CK ratio and Set 0.
*/
var LP5SpeedMbpsToSPDEncoding = map[int]LP5SpeedParams{
6400: {
- TCKMinPs: 1250, /* 1 / (6400 / 2 / 4) */
+ defaultTCKMinPs : 312, /* 1 / (6400 / 2) */
MaxCASLatency: 17,
},
5500: {
- TCKMinPs: 1455, /* 1 / (5500 / 2 / 4) */
+ defaultTCKMinPs : 363, /* 1 / (5500 / 2) */
MaxCASLatency: 15,
},
}
@@ -550,6 +561,21 @@ func LP5EncodeBusWidth(memAttribs *LP5MemAttributes) byte {
return f.busWidthEncoding
}
+func LP5GetTCKMinPs(memAttribs *LP5MemAttributes) int {
+ f, ok := LP5SetInfo[LP5CurrSet]
+
+ if ok == false || f.speedToTCKMinPs == nil {
+ return LP5SpeedMbpsToSPDEncoding[memAttribs.SpeedMbps].defaultTCKMinPs
+ }
+
+ tCKMinPs, ok := f.speedToTCKMinPs[memAttribs.SpeedMbps]
+ if ok == false || tCKMinPs == 0 {
+ fmt.Printf("TCKMinPs not defined for speed %d(Mbps) in LP5Set %d\n", memAttribs.SpeedMbps, LP5CurrSet)
+ }
+
+ return tCKMinPs
+}
+
func LP5EncodeTCKMin(memAttribs *LP5MemAttributes) byte {
return convPsToMtbByte(memAttribs.TCKMinPs)
}
@@ -608,7 +634,7 @@ func LP5EncodeTRFCPBMinLsb(memAttribs *LP5MemAttributes) byte {
func LP5UpdateTCKMin(memAttribs *LP5MemAttributes) {
if memAttribs.TCKMinPs == 0 {
- memAttribs.TCKMinPs = LP5SpeedMbpsToSPDEncoding[memAttribs.SpeedMbps].TCKMinPs
+ memAttribs.TCKMinPs = LP5GetTCKMinPs(memAttribs)
}
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-28 19:08:50 +0000