summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--src/ec/google/chromeec/ec.c23
-rw-r--r--src/ec/google/chromeec/ec.h2
-rw-r--r--src/mainboard/google/fizz/ramstage.c42
3 files changed, 56 insertions, 11 deletions
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index 28625e409615..efe22e2ab950 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -986,25 +986,32 @@ int google_chromeec_pd_get_amode(uint16_t svid)
return 0;
}
-const static long wait_for_display_timeout_ms = 2000;
#define USB_SID_DISPLAYPORT 0xff01
-void google_chromeec_wait_for_display(void)
+/**
+ * Wait for DisplayPort to be ready
+ *
+ * @param timeout Wait aborts after <timeout> ms.
+ * @return 1: Success or 0: Timeout.
+ */
+int google_chromeec_wait_for_displayport(long timeout)
{
struct stopwatch sw;
- printk(BIOS_INFO, "Waiting for display\n");
- stopwatch_init_msecs_expire(&sw, wait_for_display_timeout_ms);
+ printk(BIOS_INFO, "Waiting for DisplayPort\n");
+ stopwatch_init_msecs_expire(&sw, timeout);
while (google_chromeec_pd_get_amode(USB_SID_DISPLAYPORT) != 1) {
if (stopwatch_expired(&sw)) {
printk(BIOS_WARNING,
- "Display not ready after %ldms. Abort.\n",
- wait_for_display_timeout_ms);
- return;
+ "DisplayPort not ready after %ldms. Abort.\n",
+ timeout);
+ return 0;
}
mdelay(200);
}
- printk(BIOS_INFO, "Display ready after %lu ms\n",
+ printk(BIOS_INFO, "DisplayPort ready after %lu ms\n",
stopwatch_duration_msecs(&sw));
+
+ return 1;
}
diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h
index 1ff07b7117a7..24c892291a10 100644
--- a/src/ec/google/chromeec/ec.h
+++ b/src/ec/google/chromeec/ec.h
@@ -37,7 +37,7 @@ bool google_chromeec_is_uhepi_supported(void);
int google_ec_running_ro(void);
void google_chromeec_init(void);
int google_chromeec_pd_get_amode(uint16_t svid);
-void google_chromeec_wait_for_display(void);
+int google_chromeec_wait_for_displayport(long timeout);
/* Device events */
uint64_t google_chromeec_get_device_enabled_events(void);
diff --git a/src/mainboard/google/fizz/ramstage.c b/src/mainboard/google/fizz/ramstage.c
index e5215f87d84e..231ed8797310 100644
--- a/src/mainboard/google/fizz/ramstage.c
+++ b/src/mainboard/google/fizz/ramstage.c
@@ -14,15 +14,53 @@
*/
#include <bootmode.h>
+#include <console/console.h>
+#include <delay.h>
#include <ec/google/chromeec/ec.h>
+#include <gpio.h>
+#include <mainboard/google/fizz/gpio.h>
+#include <soc/gpio.h>
#include <soc/ramstage.h>
+#include <timer.h>
#include "gpio.h"
+#define GPIO_HDMI_HPD GPP_E13
+#define GPIO_DP_HPD GPP_E14
+
+/* TODO: This can be moved to common directory */
+static void wait_for_hpd(gpio_t gpio, long timeout)
+{
+ struct stopwatch sw;
+
+ printk(BIOS_INFO, "Waiting for HPD\n");
+ gpio_input(gpio);
+
+ stopwatch_init_msecs_expire(&sw, timeout);
+ while (!gpio_get(gpio)) {
+ if (stopwatch_expired(&sw)) {
+ printk(BIOS_WARNING,
+ "HPD not ready after %ldms. Abort.\n", timeout);
+ return;
+ }
+ mdelay(200);
+ }
+ printk(BIOS_INFO, "HPD ready after %lu ms\n",
+ stopwatch_duration_msecs(&sw));
+}
+
void mainboard_silicon_init_params(FSP_SIL_UPD *params)
{
- if (display_init_required())
+ static const long display_timeout_ms = 3000;
+
+ /* This is reconfigured back to whatever FSP-S expects by
+ gpio_configure_pads. */
+ gpio_input(GPIO_HDMI_HPD);
+ if (display_init_required() && !gpio_get(GPIO_HDMI_HPD)) {
/* This has to be done before FSP-S runs. */
- google_chromeec_wait_for_display();
+ if (google_chromeec_wait_for_displayport(display_timeout_ms))
+ wait_for_hpd(GPIO_DP_HPD, display_timeout_ms);
+ }
+
gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
}