diff options
| -rw-r--r-- | src/soc/intel/alderlake/include/soc/meminit.h | 6 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/meminit.c | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/include/soc/meminit.h b/src/soc/intel/alderlake/include/soc/meminit.h index 96e049cf992b..49e3c769bca8 100644 --- a/src/soc/intel/alderlake/include/soc/meminit.h +++ b/src/soc/intel/alderlake/include/soc/meminit.h @@ -103,6 +103,12 @@ struct mb_cfg { /* Board type */ uint8_t UserBd; + + /* Command Mirror */ + uint8_t CmdMirror; + + /* Enable/Disable TxDqDqs Retraining for Lp4/Lp5/DDR */ + uint8_t LpDdrDqDqsReTraining; }; void memcfg_init(FSP_M_CONFIG *mem_cfg, const struct mb_cfg *mb_cfg, diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c index 48d338600d28..33f26da87f37 100644 --- a/src/soc/intel/alderlake/meminit.c +++ b/src/soc/intel/alderlake/meminit.c @@ -226,6 +226,12 @@ void memcfg_init(FSP_M_CONFIG *mem_cfg, const struct mb_cfg *mb_cfg, mem_cfg->UserBd = mb_cfg->UserBd; set_rcomp_config(mem_cfg, mb_cfg); + /* Fill command mirror for memory */ + mem_cfg->CmdMirror = mb_cfg->CmdMirror; + + /* Fill LpDdrrDqDqs Retraining for memory */ + mem_cfg->LpDdrDqDqsReTraining = mb_cfg->LpDdrDqDqsReTraining; + switch (mb_cfg->type) { case MEM_TYPE_DDR4: case MEM_TYPE_DDR5: |