diff options
| -rw-r--r-- | util/inteltool/inteltool.c | 2 | ||||
| -rw-r--r-- | util/inteltool/inteltool.h | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index d7415b07d283..e807cb148d16 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -142,6 +142,8 @@ static const struct { "10th generation (Comet Lake family) Core Processor (Mobile)" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HEWITTLAKE, "Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D (Hewitt Lake)" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SAPPHIRERAPIDS_SP, + "Xeon Scalable Processor 4th generation (Sapphire Rapids SP)" }, /* Southbridges (LPC controllers) */ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "371AB/EB/MB" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10, "ICH10" }, diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index a528485bf06b..c362550fa5a1 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -299,6 +299,7 @@ static inline uint32_t inl(unsigned port) #define PCI_DEVICE_ID_INTEL_CORE_CML_U2 0x9b61 /* Cometlake U (Mobile) */ #define PCI_DEVICE_ID_INTEL_CORE_CML_U3 0x9b71 /* Cometlake U (Mobile) */ #define PCI_DEVICE_ID_INTEL_HEWITTLAKE 0x6f00 /* Hewitt Lake */ +#define PCI_DEVICE_ID_INTEL_SAPPHIRERAPIDS_SP 0x09a2 /* Sapphire Rapids SP */ /* Intel GPUs */ |