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-rw-r--r--src/soc/amd/cezanne/Kconfig1
-rw-r--r--src/soc/amd/cezanne/fch.c6
2 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 1d769be84dce..dafc26f4ef72 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -61,6 +61,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
select SOC_AMD_COMMON_BLOCK_UART
select SOC_AMD_COMMON_BLOCK_UCODE
+ select SOC_AMD_COMMON_FSP_PCI
select SSE2
select UDK_2017_BINDING
select X86_AMD_FIXED_MTRRS
diff --git a/src/soc/amd/cezanne/fch.c b/src/soc/amd/cezanne/fch.c
index 88265abb0496..028ffec17b7e 100644
--- a/src/soc/amd/cezanne/fch.c
+++ b/src/soc/amd/cezanne/fch.c
@@ -131,6 +131,12 @@ static void set_pci_irqs(void *unused)
{
/* Write PCI_INTR regs 0xC00/0xC01 */
write_pci_int_table();
+
+ /* pirq_data is consumed by `write_pci_cfg_irqs` */
+ populate_pirq_data();
+
+ /* Write IRQs for all devicetree enabled devices */
+ write_pci_cfg_irqs();
}
/*