summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--src/southbridge/amd/agesa/hudson/reset.c8
-rw-r--r--src/southbridge/amd/cimx/sb800/reset.c2
-rw-r--r--src/southbridge/amd/pi/hudson/reset.c8
3 files changed, 9 insertions, 9 deletions
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c
index 67c19254c6a9..48751a4e643c 100644
--- a/src/southbridge/amd/agesa/hudson/reset.c
+++ b/src/southbridge/amd/agesa/hudson/reset.c
@@ -7,10 +7,10 @@
#include <cf9_reset.h>
#include <reset.h>
-#define HT_INIT_CONTROL 0x6c
-#define HTIC_ColdR_Detect (1<<4)
-#define HTIC_BIOSR_Detect (1<<5)
-#define HTIC_INIT_Detect (1<<6)
+#define HT_INIT_CONTROL 0x6c
+#define HTIC_ColdR_Detect (1<<4)
+#define HTIC_BIOSR_Detect (1<<5)
+#define HTIC_INIT_Detect (1<<6)
void cf9_reset_prepare(void)
{
diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c
index aad6d2e61606..b04c3e291853 100644
--- a/src/southbridge/amd/cimx/sb800/reset.c
+++ b/src/southbridge/amd/cimx/sb800/reset.c
@@ -7,7 +7,7 @@
#include <cf9_reset.h>
#include <reset.h>
-#define HT_INIT_CONTROL 0x6C
+#define HT_INIT_CONTROL 0x6c
#define HTIC_BIOSR_Detect (1<<5)
#define DEV_CDB 0x18
diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c
index 67c19254c6a9..48751a4e643c 100644
--- a/src/southbridge/amd/pi/hudson/reset.c
+++ b/src/southbridge/amd/pi/hudson/reset.c
@@ -7,10 +7,10 @@
#include <cf9_reset.h>
#include <reset.h>
-#define HT_INIT_CONTROL 0x6c
-#define HTIC_ColdR_Detect (1<<4)
-#define HTIC_BIOSR_Detect (1<<5)
-#define HTIC_INIT_Detect (1<<6)
+#define HT_INIT_CONTROL 0x6c
+#define HTIC_ColdR_Detect (1<<4)
+#define HTIC_BIOSR_Detect (1<<5)
+#define HTIC_INIT_Detect (1<<6)
void cf9_reset_prepare(void)
{