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-rw-r--r--src/mainboard/amd/serengeti_cheetah/romstage.c2
-rw-r--r--src/mainboard/asus/m2n-e/romstage.c2
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/romstage.c2
-rw-r--r--src/mainboard/gigabyte/m57sli/romstage.c2
-rw-r--r--src/mainboard/hp/dl145_g3/romstage.c2
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/romstage.c2
-rw-r--r--src/mainboard/iwill/dk8_htx/romstage.c2
-rw-r--r--src/mainboard/iwill/dk8s2/romstage.c2
-rw-r--r--src/mainboard/iwill/dk8x/romstage.c2
-rw-r--r--src/mainboard/msi/ms7260/romstage.c2
-rw-r--r--src/mainboard/msi/ms9185/romstage.c2
-rw-r--r--src/mainboard/msi/ms9282/romstage.c2
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c2
-rw-r--r--src/mainboard/nvidia/l1_2pvv/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8dme/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8dmr/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c2
-rw-r--r--src/mainboard/tyan/s2912/romstage.c2
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c2
20 files changed, 20 insertions, 20 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
index d00779d0a4de..7da7925eff23 100644
--- a/src/mainboard/amd/serengeti_cheetah/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c
@@ -197,7 +197,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
-// init_timer(); // Need to use TMICT to synconize FID/VID
+// init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c
index aba3758a0509..4391aa03d98a 100644
--- a/src/mainboard/asus/m2n-e/romstage.c
+++ b/src/mainboard/asus/m2n-e/romstage.c
@@ -138,7 +138,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* TODO: FIDVID */
- init_timer(); /* Need to use TMICT to synconize FID/VID. */
+ init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset |= optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index 2cd2a885fb15..d6f091b276a4 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -192,7 +192,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
-// init_timer(); // Need to use TMICT to synconize FID/VID
+// init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index ebfe2a8e08cb..c4ce8c625aef 100644
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -181,7 +181,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
#endif
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
needs_reset |= optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index cb83c083f717..31f523fac9a4 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -205,7 +205,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
- // init_timer(); // Need to use TMICT to synconize FID/VID
+ // init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index 335c06be5fc7..d7e84472a2d6 100644
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -200,7 +200,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
-// init_timer(); // Need to use TMICT to synconize FID/VID
+// init_timer(); // Need to use TMICT to synchronize FID/VID
printk(BIOS_DEBUG, "raminit_amdmct()\n");
raminit_amdmct(sysinfo);
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index 829f6c8606bd..9b5b38db7267 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -152,7 +152,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
#if 0
diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index abbde20fc5ef..601c6490f6b6 100644
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -153,7 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
#if 0
diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c
index e160fdff1d61..273e9f12f9f1 100644
--- a/src/mainboard/iwill/dk8x/romstage.c
+++ b/src/mainboard/iwill/dk8x/romstage.c
@@ -153,7 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
#if 0
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index d2e761a82892..e1fef43682a7 100644
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
#endif
- init_timer(); /* Need to use TMICT to synconize FID/VID. */
+ init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset |= optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c
index e86cb854ef2e..c1faab512d9f 100644
--- a/src/mainboard/msi/ms9185/romstage.c
+++ b/src/mainboard/msi/ms9185/romstage.c
@@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
-// init_timer(); // Need to use TMICT to synconize FID/VID
+// init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index fc542513d5ba..98aacf2792ad 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -149,7 +149,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#endif
ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
- init_timer(); /* Need to use TMICT to synconize FID/VID. */
+ init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset = optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index cdeaf7b68443..45f05a59bc6c 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -203,7 +203,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
msr=rdmsr(0xc0010071);
printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);
#endif
- init_timer(); /* Need to use TMICT to synconize FID/VID. */
+ init_timer(); /* Need to use TMICT to synchronize FID/VID. */
wants_reset = mcp55_early_setup_x();
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index 785b52f969d7..ab0f1dd8ad28 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
#endif
- init_timer(); /* Need to use TMICT to synconize FID/VID. */
+ init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset |= optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c
index 3edd0930f060..ef78450ce35f 100644
--- a/src/mainboard/supermicro/h8dme/romstage.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
@@ -185,7 +185,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
#endif
- init_timer(); /* Need to use TMICT to synconize FID/VID. */
+ init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset |= optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c
index 1675427c7441..e87b84507cd7 100644
--- a/src/mainboard/supermicro/h8dmr/romstage.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
@@ -162,7 +162,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
#endif
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
needs_reset |= optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index d185653d8323..bc1ca24334d0 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
msr.hi, msr.lo);
#endif
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
wants_reset = mcp55_early_setup_x();
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 72ca8b68c069..2be09bccac75 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -263,7 +263,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);
#endif
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
wants_reset = mcp55_early_setup_x();
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 80430cbf67c4..07f9efd71f9c 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -165,7 +165,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
#endif
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
needs_reset |= optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 2a9c2a491f51..74c0aaabd30b 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);
#endif
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
wants_reset = mcp55_early_setup_x();