diff options
87 files changed, 114 insertions, 114 deletions
diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index a2e576f3270f..01d817bc9cf3 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -7,7 +7,7 @@ smmobj-y += printk.o smmobj-y += vtxprintf.o initobj-y += vtxprintf.o -initobj-$(CONFIG_USE_DCACHE_RAM) += console.o +initobj-$(CONFIG_CACHE_AS_RAM) += console.o driver-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.o driver-$(CONFIG_USBDEBUG) += usbdebug_console.o diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 1b72f6e5aaae..1031db0bb62a 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -3,7 +3,7 @@ source src/cpu/intel/Kconfig source src/cpu/via/Kconfig source src/cpu/x86/Kconfig -config USE_DCACHE_RAM +config CACHE_AS_RAM bool default !ROMCC diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index 6c66ebaf1341..3789fdebdf58 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -1,6 +1,6 @@ config CPU_AMD_MODEL_10XXX bool - select USE_DCACHE_RAM + select CACHE_AS_RAM select SSE select SSE2 diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig index 4f59b6d08ad1..21fc1ab37773 100644 --- a/src/cpu/amd/model_fxx/Kconfig +++ b/src/cpu/amd/model_fxx/Kconfig @@ -1,6 +1,6 @@ config CPU_AMD_MODEL_FXX bool - select USE_DCACHE_RAM + select CACHE_AS_RAM select MMX select SSE select SSE2 diff --git a/src/cpu/amd/model_gx2/syspreinit.c b/src/cpu/amd/model_gx2/syspreinit.c index 5801f33a47f9..286e6b9fce23 100644 --- a/src/cpu/amd/model_gx2/syspreinit.c +++ b/src/cpu/amd/model_gx2/syspreinit.c @@ -16,7 +16,7 @@ static void StartTimer1(void) void SystemPreInit(void) { /* they want a jump ... */ -#ifndef CONFIG_USE_DCACHE_RAM +#ifndef CONFIG_CACHE_AS_RAM __asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n"); #endif StartTimer1(); diff --git a/src/cpu/amd/model_lx/syspreinit.c b/src/cpu/amd/model_lx/syspreinit.c index 33c6ece94212..0d80cba69d69 100644 --- a/src/cpu/amd/model_lx/syspreinit.c +++ b/src/cpu/amd/model_lx/syspreinit.c @@ -39,7 +39,7 @@ void SystemPreInit(void) { /* they want a jump ... */ -#ifndef CONFIG_USE_DCACHE_RAM +#ifndef CONFIG_CACHE_AS_RAM __asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n"); #endif StartTimer1(); diff --git a/src/cpu/intel/socket_FC_PGA370/Kconfig b/src/cpu/intel/socket_FC_PGA370/Kconfig index 7116f32e0a3d..f3987783a889 100644 --- a/src/cpu/intel/socket_FC_PGA370/Kconfig +++ b/src/cpu/intel/socket_FC_PGA370/Kconfig @@ -23,7 +23,7 @@ config CPU_INTEL_SOCKET_FC_PGA370 select CPU_INTEL_MODEL_68X select MMX select SSE - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config DCACHE_RAM_BASE diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index 72c471e180d4..5c83554cb2c3 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -62,7 +62,7 @@ static inline void cache_lbmem(int type) enable_cache(); } -#if !defined(CONFIG_USE_DCACHE_RAM) || (CONFIG_USE_DCACHE_RAM == 0) +#if !defined(CONFIG_CACHE_AS_RAM) || (CONFIG_CACHE_AS_RAM == 0) /* the fixed and variable MTTRs are power-up with random values, * clear them to MTRR_TYPE_UNCACHEABLE for safty. */ diff --git a/src/include/assert.h b/src/include/assert.h index 0b21c2ae861d..346e76961e80 100644 --- a/src/include/assert.h +++ b/src/include/assert.h @@ -20,7 +20,7 @@ #ifndef __ASSERT_H__ #define __ASSERT_H__ -#if defined(__PRE_RAM__) && !CONFIG_USE_DCACHE_RAM +#if defined(__PRE_RAM__) && !CONFIG_CACHE_AS_RAM /* ROMCC versions */ #define ASSERT(x) { \ diff --git a/src/include/cpu/x86/bist.h b/src/include/cpu/x86/bist.h index 8232b9c6873b..d1646bf6c03d 100644 --- a/src/include/cpu/x86/bist.h +++ b/src/include/cpu/x86/bist.h @@ -4,7 +4,7 @@ static void report_bist_failure(u32 bist) { if (bist != 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_EMERG, "BIST failed: %08x", bist); #else print_emerg("BIST failed: "); diff --git a/src/lib/generic_sdram.c b/src/lib/generic_sdram.c index be3499fd0243..3f691cb5a916 100644 --- a/src/lib/generic_sdram.c +++ b/src/lib/generic_sdram.c @@ -6,7 +6,7 @@ static inline void print_debug_sdram_8(const char *strval, uint32_t val) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%s%02x\n", strval, val); #else print_debug(strval); print_debug_hex8(val); print_debug("\n"); diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c index a7944e4ea3ca..abda1065aa3b 100644 --- a/src/lib/ramtest.c +++ b/src/lib/ramtest.c @@ -51,7 +51,7 @@ static void ram_fill(unsigned long start, unsigned long stop) /* * Fill. */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\n", start, stop); #else print_debug("DRAM fill: "); @@ -63,7 +63,7 @@ static void ram_fill(unsigned long start, unsigned long stop) for(addr = start; addr < stop ; addr += 4) { /* Display address being filled */ if (!(addr & 0xfffff)) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%08lx \r", addr); #else print_debug_hex32(addr); @@ -73,7 +73,7 @@ static void ram_fill(unsigned long start, unsigned long stop) write_phys(addr, (u32)addr); }; /* Display final address */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%08lx\nDRAM filled\n", addr); #else print_debug_hex32(addr); @@ -88,7 +88,7 @@ static void ram_verify(unsigned long start, unsigned long stop) /* * Verify. */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\n", start, stop); #else print_debug("DRAM verify: "); @@ -101,7 +101,7 @@ static void ram_verify(unsigned long start, unsigned long stop) unsigned long value; /* Display address being tested */ if (!(addr & 0xfffff)) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%08lx \r", addr); #else print_debug_hex32(addr); @@ -111,7 +111,7 @@ static void ram_verify(unsigned long start, unsigned long stop) value = read_phys(addr); if (value != addr) { /* Display address with error */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\n", addr, value); #else print_err("Fail: @0x"); @@ -122,7 +122,7 @@ static void ram_verify(unsigned long start, unsigned long stop) #endif i++; if(i>256) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "Aborting.\n"); #else print_debug("Aborting.\n"); @@ -132,14 +132,14 @@ static void ram_verify(unsigned long start, unsigned long stop) } } /* Display final address */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%08lx", addr); #else print_debug_hex32(addr); #endif if (i) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n"); #else print_debug("\nDRAM did _NOT_ verify!\n"); @@ -147,7 +147,7 @@ static void ram_verify(unsigned long start, unsigned long stop) die("DRAM ERROR"); } else { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\nDRAM range verified.\n"); #else print_debug("\nDRAM range verified.\n"); @@ -163,7 +163,7 @@ void ram_check(unsigned long start, unsigned long stop) * test than a "Is my DRAM faulty?" test. Not all bits * are tested. -Tyson */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop); #else print_debug("Testing DRAM : "); @@ -176,7 +176,7 @@ void ram_check(unsigned long start, unsigned long stop) /* Make sure we don't read before we wrote */ phys_memory_barrier(); ram_verify(start, stop); -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "Done.\n"); #else print_debug("Done.\n"); diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index ec89bfe89233..42b4ba87d32f 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -22,7 +22,7 @@ #if !defined(__ROMCC__) #include <console/console.h> #else -#if CONFIG_USE_DCACHE_RAM==0 +#if CONFIG_CACHE_AS_RAM==0 #define printk(BIOS_DEBUG, fmt, arg...) do {} while(0) #endif #endif diff --git a/src/mainboard/amd/db800/Kconfig b/src/mainboard/amd/db800/Kconfig index 2755f7c259ad..006de405e12b 100644 --- a/src/mainboard/amd/db800/Kconfig +++ b/src/mainboard/amd/db800/Kconfig @@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR diff --git a/src/mainboard/amd/dbm690t/Kconfig b/src/mainboard/amd/dbm690t/Kconfig index 91a24bd3b770..224a0be890c2 100644 --- a/src/mainboard/amd/dbm690t/Kconfig +++ b/src/mainboard/amd/dbm690t/Kconfig @@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_MAINBOARD_RESOURCES select HAVE_BUS_CONFIG - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/amd/mahogany/Kconfig b/src/mainboard/amd/mahogany/Kconfig index d737712b957a..e20d9a8f7a48 100644 --- a/src/mainboard/amd/mahogany/Kconfig +++ b/src/mainboard/amd/mahogany/Kconfig @@ -17,7 +17,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_MAINBOARD_RESOURCES select HAVE_BUS_CONFIG select LIFT_BSP_APIC_ID - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/amd/mahogany_fam10/Kconfig b/src/mainboard/amd/mahogany_fam10/Kconfig index c12812f81f0e..762a1aca2974 100644 --- a/src/mainboard/amd/mahogany_fam10/Kconfig +++ b/src/mainboard/amd/mahogany_fam10/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID diff --git a/src/mainboard/amd/norwich/Kconfig b/src/mainboard/amd/norwich/Kconfig index 1b6aa56682a5..d97e52216128 100644 --- a/src/mainboard/amd/norwich/Kconfig +++ b/src/mainboard/amd/norwich/Kconfig @@ -9,7 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR diff --git a/src/mainboard/amd/pistachio/Kconfig b/src/mainboard/amd/pistachio/Kconfig index 1ce9fd1a140b..f0f8b25e80bc 100644 --- a/src/mainboard/amd/pistachio/Kconfig +++ b/src/mainboard/amd/pistachio/Kconfig @@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT diff --git a/src/mainboard/amd/rumba/Kconfig b/src/mainboard/amd/rumba/Kconfig index 4df3b8100fad..5d35dcf32baf 100644 --- a/src/mainboard/amd/rumba/Kconfig +++ b/src/mainboard/amd/rumba/Kconfig @@ -25,7 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig index ed5339dfb7d8..f2a0901ec969 100644 --- a/src/mainboard/amd/serengeti_cheetah/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID #select AP_CODE_IN_CAR diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig index d2960e24112b..5149df31e7a9 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig @@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select SERIAL_CPU_INIT diff --git a/src/mainboard/amd/tilapia_fam10/Kconfig b/src/mainboard/amd/tilapia_fam10/Kconfig index a0d58fa9a015..e44d012cdff3 100644 --- a/src/mainboard/amd/tilapia_fam10/Kconfig +++ b/src/mainboard/amd/tilapia_fam10/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID diff --git a/src/mainboard/arima/hdama/Kconfig b/src/mainboard/arima/hdama/Kconfig index e0dbfc4939b8..3f89162a0728 100644 --- a/src/mainboard/arima/hdama/Kconfig +++ b/src/mainboard/arima/hdama/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select HAVE_OPTION_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/artecgroup/dbe61/Kconfig b/src/mainboard/artecgroup/dbe61/Kconfig index 4eab80a388e8..3997be885686 100644 --- a/src/mainboard/artecgroup/dbe61/Kconfig +++ b/src/mainboard/artecgroup/dbe61/Kconfig @@ -9,7 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR diff --git a/src/mainboard/asrock/939a785gmh/Kconfig b/src/mainboard/asrock/939a785gmh/Kconfig index 176c5d628880..c006363209f8 100644 --- a/src/mainboard/asrock/939a785gmh/Kconfig +++ b/src/mainboard/asrock/939a785gmh/Kconfig @@ -18,7 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_BUS_CONFIG select LIFT_BSP_APIC_ID - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/asus/a8n_e/Kconfig b/src/mainboard/asus/a8n_e/Kconfig index 9b4cdc85d3c5..b3b61546e18f 100644 --- a/src/mainboard/asus/a8n_e/Kconfig +++ b/src/mainboard/asus/a8n_e/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/asus/a8v-e_se/Kconfig b/src/mainboard/asus/a8v-e_se/Kconfig index 7bf7d0ff01b3..92a7567e95f7 100644 --- a/src/mainboard/asus/a8v-e_se/Kconfig +++ b/src/mainboard/asus/a8v-e_se/Kconfig @@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_K8T890 select SUPERIO_WINBOND_W83627EHG - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES select HAVE_MP_TABLE diff --git a/src/mainboard/asus/m2v-mx_se/Kconfig b/src/mainboard/asus/m2v-mx_se/Kconfig index cf26512f944e..41499613c63a 100644 --- a/src/mainboard/asus/m2v-mx_se/Kconfig +++ b/src/mainboard/asus/m2v-mx_se/Kconfig @@ -27,7 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_K8M890 select SUPERIO_ITE_IT8712F - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/broadcom/blast/Kconfig b/src/mainboard/broadcom/blast/Kconfig index fa7fab4043a8..2c14b0a1eda7 100644 --- a/src/mainboard/broadcom/blast/Kconfig +++ b/src/mainboard/broadcom/blast/Kconfig @@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 select SB_HT_CHAIN_UNITID_OFFSET_ONLY diff --git a/src/mainboard/digitallogic/adl855pc/Kconfig b/src/mainboard/digitallogic/adl855pc/Kconfig index 75e119f54ce7..52f00773d6ee 100644 --- a/src/mainboard/digitallogic/adl855pc/Kconfig +++ b/src/mainboard/digitallogic/adl855pc/Kconfig @@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_1024 - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR diff --git a/src/mainboard/digitallogic/msm800sev/Kconfig b/src/mainboard/digitallogic/msm800sev/Kconfig index 7ac7138de72b..6172b2621958 100644 --- a/src/mainboard/digitallogic/msm800sev/Kconfig +++ b/src/mainboard/digitallogic/msm800sev/Kconfig @@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig index 8df358702c33..b258a8ba3abe 100644 --- a/src/mainboard/getac/p470/Kconfig +++ b/src/mainboard/getac/p470/Kconfig @@ -42,7 +42,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select UDELAY_LAPIC select HAVE_SMI_HANDLER select BOARD_ROMSIZE_KB_1024 - select USE_DCACHE_RAM + select CACHE_AS_RAM select GFXUMA select TINY_BOOTBLOCK diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig index bcd92056ffda..1b17b6594c9c 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig +++ b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig @@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_BUS_CONFIG select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select K8_REV_F_SUPPORT diff --git a/src/mainboard/gigabyte/m57sli/Kconfig b/src/mainboard/gigabyte/m57sli/Kconfig index 55ac32070643..e0e582e25351 100644 --- a/src/mainboard/gigabyte/m57sli/Kconfig +++ b/src/mainboard/gigabyte/m57sli/Kconfig @@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select HAVE_ACPI_TABLES diff --git a/src/mainboard/gigabyte/ma785gmt/Kconfig b/src/mainboard/gigabyte/ma785gmt/Kconfig index 767f681862a1..99cf85012445 100644 --- a/src/mainboard/gigabyte/ma785gmt/Kconfig +++ b/src/mainboard/gigabyte/ma785gmt/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID diff --git a/src/mainboard/gigabyte/ma78gm/Kconfig b/src/mainboard/gigabyte/ma78gm/Kconfig index f8d7a3e785aa..6ad715c45183 100644 --- a/src/mainboard/gigabyte/ma78gm/Kconfig +++ b/src/mainboard/gigabyte/ma78gm/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID diff --git a/src/mainboard/hp/dl145_g3/Kconfig b/src/mainboard/hp/dl145_g3/Kconfig index e2dc909e1edc..065ddac76eae 100644 --- a/src/mainboard/hp/dl145_g3/Kconfig +++ b/src/mainboard/hp/dl145_g3/Kconfig @@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig index 848e1a082db9..c4fa996fba7e 100644 --- a/src/mainboard/ibase/mb899/Kconfig +++ b/src/mainboard/ibase/mb899/Kconfig @@ -19,7 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MMCONF_SUPPORT select HAVE_SMI_HANDLER select BOARD_ROMSIZE_KB_512 - select USE_DCACHE_RAM + select CACHE_AS_RAM select GFXUMA select TINY_BOOTBLOCK diff --git a/src/mainboard/ibm/e325/Kconfig b/src/mainboard/ibm/e325/Kconfig index 83f0b1f57be8..143618faeda3 100644 --- a/src/mainboard/ibm/e325/Kconfig +++ b/src/mainboard/ibm/e325/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT diff --git a/src/mainboard/ibm/e326/Kconfig b/src/mainboard/ibm/e326/Kconfig index 4d345088ac81..147f37918e68 100644 --- a/src/mainboard/ibm/e326/Kconfig +++ b/src/mainboard/ibm/e326/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig index ecd6d89ec9ac..91766050f14b 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig +++ b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig @@ -9,7 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SUPERIO_WINBOND_W83627HF select HAVE_PIRQ_TABLE select PIRQ_ROUTE - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig index df9ed1df0cdf..32a25d7fa7da 100644 --- a/src/mainboard/intel/d945gclf/Kconfig +++ b/src/mainboard/intel/d945gclf/Kconfig @@ -41,7 +41,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES select HAVE_SMI_HANDLER select BOARD_ROMSIZE_KB_512 - select USE_DCACHE_RAM + select CACHE_AS_RAM select GFXUMA select TINY_BOOTBLOCK diff --git a/src/mainboard/intel/mtarvon/Kconfig b/src/mainboard/intel/mtarvon/Kconfig index 065d6d9de6c5..9ed066c88306 100644 --- a/src/mainboard/intel/mtarvon/Kconfig +++ b/src/mainboard/intel/mtarvon/Kconfig @@ -7,7 +7,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_INTEL_I3100 select SOUTHBRIDGE_INTEL_I3100 select SUPERIO_INTEL_I3100 - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select HAVE_PIRQ_TABLE select HAVE_MP_TABLE diff --git a/src/mainboard/iwill/dk8_htx/Kconfig b/src/mainboard/iwill/dk8_htx/Kconfig index eebfef554470..5232b70acc82 100644 --- a/src/mainboard/iwill/dk8_htx/Kconfig +++ b/src/mainboard/iwill/dk8_htx/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select SB_HT_CHAIN_UNITID_OFFSET_ONLY diff --git a/src/mainboard/iwill/dk8s2/Kconfig b/src/mainboard/iwill/dk8s2/Kconfig index ee88bd375f1b..4d4084707c58 100644 --- a/src/mainboard/iwill/dk8s2/Kconfig +++ b/src/mainboard/iwill/dk8s2/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select HAVE_OPTION_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT diff --git a/src/mainboard/iwill/dk8x/Kconfig b/src/mainboard/iwill/dk8x/Kconfig index 652ff1beb6df..315a743f3643 100644 --- a/src/mainboard/iwill/dk8x/Kconfig +++ b/src/mainboard/iwill/dk8x/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT diff --git a/src/mainboard/jetway/pa78vm5/Kconfig b/src/mainboard/jetway/pa78vm5/Kconfig index 23ad721c9c83..63e48ebe2553 100644 --- a/src/mainboard/jetway/pa78vm5/Kconfig +++ b/src/mainboard/jetway/pa78vm5/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID diff --git a/src/mainboard/kontron/986lcd-m/Kconfig b/src/mainboard/kontron/986lcd-m/Kconfig index 59b502808dc8..8a8dcb8835e4 100644 --- a/src/mainboard/kontron/986lcd-m/Kconfig +++ b/src/mainboard/kontron/986lcd-m/Kconfig @@ -19,7 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MMCONF_SUPPORT select HAVE_SMI_HANDLER select BOARD_ROMSIZE_KB_1024 - select USE_DCACHE_RAM + select CACHE_AS_RAM select GFXUMA select TINY_BOOTBLOCK diff --git a/src/mainboard/kontron/kt690/Kconfig b/src/mainboard/kontron/kt690/Kconfig index f87cffaafdec..3bc5e395b3e1 100644 --- a/src/mainboard/kontron/kt690/Kconfig +++ b/src/mainboard/kontron/kt690/Kconfig @@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_MP_TABLE select HAVE_MAINBOARD_RESOURCES select GFXUMA - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/lanner/em8510/Kconfig b/src/mainboard/lanner/em8510/Kconfig index fb19ddcc284e..b4d03f78eb34 100644 --- a/src/mainboard/lanner/em8510/Kconfig +++ b/src/mainboard/lanner/em8510/Kconfig @@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR diff --git a/src/mainboard/lippert/frontrunner/Kconfig b/src/mainboard/lippert/frontrunner/Kconfig index adf2765c28d6..90857a72287b 100644 --- a/src/mainboard/lippert/frontrunner/Kconfig +++ b/src/mainboard/lippert/frontrunner/Kconfig @@ -7,7 +7,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5535 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 diff --git a/src/mainboard/lippert/roadrunner-lx/Kconfig b/src/mainboard/lippert/roadrunner-lx/Kconfig index 6bc2e9a9d4e4..db492220da4f 100644 --- a/src/mainboard/lippert/roadrunner-lx/Kconfig +++ b/src/mainboard/lippert/roadrunner-lx/Kconfig @@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR diff --git a/src/mainboard/lippert/spacerunner-lx/Kconfig b/src/mainboard/lippert/spacerunner-lx/Kconfig index bef189930757..0f5cde727fe4 100644 --- a/src/mainboard/lippert/spacerunner-lx/Kconfig +++ b/src/mainboard/lippert/spacerunner-lx/Kconfig @@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR diff --git a/src/mainboard/msi/ms7135/Kconfig b/src/mainboard/msi/ms7135/Kconfig index e6996ab0ba3a..f8c4e09f157a 100644 --- a/src/mainboard/msi/ms7135/Kconfig +++ b/src/mainboard/msi/ms7135/Kconfig @@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR diff --git a/src/mainboard/msi/ms7260/Kconfig b/src/mainboard/msi/ms7260/Kconfig index f89bfe005ea9..9c979aa8128f 100644 --- a/src/mainboard/msi/ms7260/Kconfig +++ b/src/mainboard/msi/ms7260/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select K8_REV_F_SUPPORT diff --git a/src/mainboard/msi/ms9185/Kconfig b/src/mainboard/msi/ms9185/Kconfig index 646d00267773..4a6410115bb9 100644 --- a/src/mainboard/msi/ms9185/Kconfig +++ b/src/mainboard/msi/ms9185/Kconfig @@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/msi/ms9282/Kconfig b/src/mainboard/msi/ms9282/Kconfig index 365d2c3d2fd0..40a07182c211 100644 --- a/src/mainboard/msi/ms9282/Kconfig +++ b/src/mainboard/msi/ms9282/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select K8_REV_F_SUPPORT select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/msi/ms9652_fam10/Kconfig b/src/mainboard/msi/ms9652_fam10/Kconfig index 212cd7037a63..829b70b007b2 100644 --- a/src/mainboard/msi/ms9652_fam10/Kconfig +++ b/src/mainboard/msi/ms9652_fam10/Kconfig @@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_OPTION_TABLE select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/newisys/khepri/Kconfig b/src/mainboard/newisys/khepri/Kconfig index 859bb19bb817..31f705d37b9c 100644 --- a/src/mainboard/newisys/khepri/Kconfig +++ b/src/mainboard/newisys/khepri/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 select SB_HT_CHAIN_UNITID_OFFSET_ONLY diff --git a/src/mainboard/nvidia/l1_2pvv/Kconfig b/src/mainboard/nvidia/l1_2pvv/Kconfig index 062d27a3c7d3..d948c228aec5 100644 --- a/src/mainboard/nvidia/l1_2pvv/Kconfig +++ b/src/mainboard/nvidia/l1_2pvv/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select K8_REV_F_SUPPORT diff --git a/src/mainboard/olpc/btest/Kconfig b/src/mainboard/olpc/btest/Kconfig index 009b9bebf2ae..a8405e2ee439 100644 --- a/src/mainboard/olpc/btest/Kconfig +++ b/src/mainboard/olpc/btest/Kconfig @@ -7,7 +7,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 diff --git a/src/mainboard/olpc/rev_a/Kconfig b/src/mainboard/olpc/rev_a/Kconfig index bae2692a6e2c..591ad5e68920 100644 --- a/src/mainboard/olpc/rev_a/Kconfig +++ b/src/mainboard/olpc/rev_a/Kconfig @@ -7,7 +7,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 diff --git a/src/mainboard/pcengines/alix1c/Kconfig b/src/mainboard/pcengines/alix1c/Kconfig index ef1f07462563..d6edad0479b8 100644 --- a/src/mainboard/pcengines/alix1c/Kconfig +++ b/src/mainboard/pcengines/alix1c/Kconfig @@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR diff --git a/src/mainboard/pcengines/alix2d3/Kconfig b/src/mainboard/pcengines/alix2d3/Kconfig index 53afe996c4f5..9d57b9dff74d 100644 --- a/src/mainboard/pcengines/alix2d3/Kconfig +++ b/src/mainboard/pcengines/alix2d3/Kconfig @@ -9,7 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR diff --git a/src/mainboard/rca/rm4100/Kconfig b/src/mainboard/rca/rm4100/Kconfig index 4ec025bb0638..988f220b34f9 100644 --- a/src/mainboard/rca/rm4100/Kconfig +++ b/src/mainboard/rca/rm4100/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_MAINBOARD_RESOURCES select HAVE_SMI_HANDLER select GFXUMA - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR diff --git a/src/mainboard/sunw/ultra40/Kconfig b/src/mainboard/sunw/ultra40/Kconfig index d806174d4211..4cd58003fe38 100644 --- a/src/mainboard/sunw/ultra40/Kconfig +++ b/src/mainboard/sunw/ultra40/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/supermicro/h8dme/Kconfig b/src/mainboard/supermicro/h8dme/Kconfig index afe96bf2fbe7..88b27a7c203a 100644 --- a/src/mainboard/supermicro/h8dme/Kconfig +++ b/src/mainboard/supermicro/h8dme/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET #select AP_CODE_IN_CAR select LIFT_BSP_APIC_ID diff --git a/src/mainboard/supermicro/h8dmr/Kconfig b/src/mainboard/supermicro/h8dmr/Kconfig index da72aff4386c..20d9e3ccc739 100644 --- a/src/mainboard/supermicro/h8dmr/Kconfig +++ b/src/mainboard/supermicro/h8dmr/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/supermicro/h8dmr_fam10/Kconfig b/src/mainboard/supermicro/h8dmr_fam10/Kconfig index 5f3930bac828..c47fe4898c70 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/Kconfig +++ b/src/mainboard/supermicro/h8dmr_fam10/Kconfig @@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select AMDMCT diff --git a/src/mainboard/supermicro/h8qme_fam10/Kconfig b/src/mainboard/supermicro/h8qme_fam10/Kconfig index 576116ccabe3..3bac4ff3eef4 100644 --- a/src/mainboard/supermicro/h8qme_fam10/Kconfig +++ b/src/mainboard/supermicro/h8qme_fam10/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select AMDMCT diff --git a/src/mainboard/technexion/tim5690/Kconfig b/src/mainboard/technexion/tim5690/Kconfig index 56dc7c8e0c5d..ec965f32e971 100644 --- a/src/mainboard/technexion/tim5690/Kconfig +++ b/src/mainboard/technexion/tim5690/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select HAVE_ACPI_TABLES diff --git a/src/mainboard/technexion/tim8690/Kconfig b/src/mainboard/technexion/tim8690/Kconfig index 9a52459e3130..4fb2cab9ccc9 100644 --- a/src/mainboard/technexion/tim8690/Kconfig +++ b/src/mainboard/technexion/tim8690/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT diff --git a/src/mainboard/thomson/ip1000/Kconfig b/src/mainboard/thomson/ip1000/Kconfig index 907ab9686cc1..1ee9189350eb 100644 --- a/src/mainboard/thomson/ip1000/Kconfig +++ b/src/mainboard/thomson/ip1000/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_MAINBOARD_RESOURCES select HAVE_SMI_HANDLER select GFXUMA - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR diff --git a/src/mainboard/traverse/geos/Kconfig b/src/mainboard/traverse/geos/Kconfig index c1d23e47a3ba..d3c643a2c841 100644 --- a/src/mainboard/traverse/geos/Kconfig +++ b/src/mainboard/traverse/geos/Kconfig @@ -9,7 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_1024 config MAINBOARD_DIR diff --git a/src/mainboard/tyan/s2735/Kconfig b/src/mainboard/tyan/s2735/Kconfig index 10f32a04c1b8..c4b15807ecc4 100644 --- a/src/mainboard/tyan/s2735/Kconfig +++ b/src/mainboard/tyan/s2735/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_MP_TABLE select UDELAY_TSC select HAVE_OPTION_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select USE_WATCHDOG_ON_BOOT select BOARD_ROMSIZE_KB_512 diff --git a/src/mainboard/tyan/s2912/Kconfig b/src/mainboard/tyan/s2912/Kconfig index 27fcbb2cb5ce..30dd3bb6feec 100644 --- a/src/mainboard/tyan/s2912/Kconfig +++ b/src/mainboard/tyan/s2912/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select K8_REV_F_SUPPORT diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig index d1a32332827f..be54fa7118c7 100644 --- a/src/mainboard/tyan/s2912_fam10/Kconfig +++ b/src/mainboard/tyan/s2912_fam10/Kconfig @@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/tyan/s4880/Kconfig b/src/mainboard/tyan/s4880/Kconfig index 0f0837bb9d2e..faff0371dbae 100644 --- a/src/mainboard/tyan/s4880/Kconfig +++ b/src/mainboard/tyan/s4880/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 select SB_HT_CHAIN_UNITID_OFFSET_ONLY diff --git a/src/mainboard/tyan/s4882/Kconfig b/src/mainboard/tyan/s4882/Kconfig index 40d2d65efba7..866aec0572cb 100644 --- a/src/mainboard/tyan/s4882/Kconfig +++ b/src/mainboard/tyan/s4882/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 select SB_HT_CHAIN_UNITID_OFFSET_ONLY diff --git a/src/mainboard/via/vt8454c/Kconfig b/src/mainboard/via/vt8454c/Kconfig index 547f6c6430b8..8652c67968ba 100644 --- a/src/mainboard/via/vt8454c/Kconfig +++ b/src/mainboard/via/vt8454c/Kconfig @@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_HARD_RESET select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_512 - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR diff --git a/src/mainboard/winent/pl6064/Kconfig b/src/mainboard/winent/pl6064/Kconfig index ea4388169657..142721441a7e 100644 --- a/src/mainboard/winent/pl6064/Kconfig +++ b/src/mainboard/winent/pl6064/Kconfig @@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR diff --git a/src/mainboard/wyse/s50/Kconfig b/src/mainboard/wyse/s50/Kconfig index 22514c36a29e..805748a2a319 100644 --- a/src/mainboard/wyse/s50/Kconfig +++ b/src/mainboard/wyse/s50/Kconfig @@ -25,7 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select PIRQ_ROUTE select BOARD_ROMSIZE_KB_256 diff --git a/src/northbridge/intel/e7501/debug.c b/src/northbridge/intel/e7501/debug.c index ed5fff140b7a..f19de0c1e7a2 100644 --- a/src/northbridge/intel/e7501/debug.c +++ b/src/northbridge/intel/e7501/debug.c @@ -39,7 +39,7 @@ static void dump_pci_device(unsigned dev) for(i = 0; i < 256; i++) { unsigned char val; if ((i & 0x0f) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%02x:",i); #else print_debug("\n"); @@ -48,7 +48,7 @@ static void dump_pci_device(unsigned dev) #endif } val = pci_read_config8(dev, i); -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, " %02x", val); #else print_debug_char(' '); @@ -101,7 +101,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl) device = ctrl->channel0[i]; if (device) { int j; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device); #else print_debug("dimm: "); @@ -113,7 +113,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%02x: ", j); #else print_debug("\n"); @@ -126,7 +126,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl) break; } byte = status & 0xff; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -138,7 +138,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl) device = ctrl->channel1[i]; if (device) { int j; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device); #else print_debug("dimm: "); @@ -150,7 +150,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%02x: ", j); #else print_debug("\n"); @@ -163,7 +163,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl) break; } byte = status & 0xff; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -181,7 +181,7 @@ static inline void dump_smbus_registers(void) for(device = 1; device < 0x80; device++) { int j; if( smbus_read_byte(device, 0) < 0 ) continue; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "smbus: %02x", device); #else print_debug("smbus: "); @@ -195,7 +195,7 @@ static inline void dump_smbus_registers(void) break; } if ((j & 0xf) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%02x: ",j); #else print_debug("\n"); @@ -204,7 +204,7 @@ static inline void dump_smbus_registers(void) #endif } byte = status & 0xff; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -219,7 +219,7 @@ static inline void dump_io_resources(unsigned port) { int i; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%04x:\n", port); #else print_debug_hex16(port); @@ -228,7 +228,7 @@ static inline void dump_io_resources(unsigned port) for(i=0;i<256;i++) { uint8_t val; if ((i & 0x0f) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%02x:", i); #else print_debug_hex8(i); @@ -236,7 +236,7 @@ static inline void dump_io_resources(unsigned port) #endif } val = inb(port); -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, " %02x",val); #else print_debug_char(' '); @@ -255,7 +255,7 @@ static inline void dump_mem(unsigned start, unsigned end) print_debug("dump_mem:"); for(i=start;i<end;i++) { if((i & 0xf)==0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%08x:", i); #else print_debug("\n"); @@ -263,7 +263,7 @@ static inline void dump_mem(unsigned start, unsigned end) print_debug(":"); #endif } -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i)); #else print_debug(" "); diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c index 78e7b72f1f65..5afddb7d9e05 100644 --- a/src/northbridge/intel/i3100/raminit.c +++ b/src/northbridge/intel/i3100/raminit.c @@ -1212,7 +1212,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) pci_write_config16(ctrl->f0, MCHSCRB, data16); /* The memory is now setup, use it */ -#if CONFIG_USE_DCACHE_RAM == 0 +#if CONFIG_CACHE_AS_RAM == 0 cache_lbmem(MTRR_TYPE_WRBACK); #endif } diff --git a/src/pc80/Makefile.inc b/src/pc80/Makefile.inc index b20f2b4161cf..b7890f56b626 100644 --- a/src/pc80/Makefile.inc +++ b/src/pc80/Makefile.inc @@ -4,7 +4,7 @@ obj-y += i8259.o obj-$(CONFIG_UDELAY_IO) += udelay_io.o obj-y += keyboard.o initobj-$(CONFIG_USE_OPTION_TABLE) += mc146818rtc_early.o -initobj-$(CONFIG_USE_DCACHE_RAM) += serial.o +initobj-$(CONFIG_CACHE_AS_RAM) += serial.o subdirs-y += vga $(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H) diff --git a/src/pc80/serial.c b/src/pc80/serial.c index 449f0bada0f9..4a4ca68d2e34 100644 --- a/src/pc80/serial.c +++ b/src/pc80/serial.c @@ -28,7 +28,7 @@ #define UART_LCS CONFIG_TTYS0_LCS -#if CONFIG_USE_DCACHE_RAM == 0 +#if CONFIG_CACHE_AS_RAM == 0 /* Data */ #define UART_RBR 0x00 @@ -97,7 +97,7 @@ void uart_init(void) } #else -/* CONFIG_USE_DCACHE_RAM == 1 */ +/* CONFIG_CACHE_AS_RAM == 1 */ extern void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs); void uart_init(void) |