diff options
| m--------- | 3rdparty/blobs | 0 | ||||
| -rw-r--r-- | src/vendorcode/amd/pi/00670F00/AGESA.h | 19 |
2 files changed, 19 insertions, 0 deletions
diff --git a/3rdparty/blobs b/3rdparty/blobs -Subproject 19dea8d171544f01f12ee6b78af0cc356ab994a +Subproject a4b561391f59e09059ce851fa19b64ca945672d diff --git a/src/vendorcode/amd/pi/00670F00/AGESA.h b/src/vendorcode/amd/pi/00670F00/AGESA.h index 17f69867d61a..2b2a8b6b621d 100644 --- a/src/vendorcode/amd/pi/00670F00/AGESA.h +++ b/src/vendorcode/amd/pi/00670F00/AGESA.h @@ -67,6 +67,7 @@ #define AGESA_RUNFUNC_ON_ALL_APS 0x00028106ul #define AGESA_IDLE_AN_AP 0x00028107ul #define AGESA_WAIT_FOR_ALL_APS 0x00028108ul +#define AGESA_HALT_THIS_AP 0x00028109ul // AGESA ADVANCED CALLOUTS, Memory #define AGESA_READ_SPD 0x00028140ul @@ -2514,6 +2515,18 @@ typedef struct { IN OUT MEM_DATA_STRUCT *MemData; ///< Location of the MemData structure, for reference } AGESA_READ_SPD_PARAMS; +/// Parameters structure for the interface call-out AGESA_HALT_THIS_AP +typedef struct { + IN OUT AMD_CONFIG_PARAMS StdHeader; ///< Standard configuration header + IN BOOLEAN ExecWbinvd; ///< Indicates whether to execute + /// WBINVD + IN BOOLEAN PrimaryCore; ///< Indicates whether current core + /// is the primary core of the + /// compute unit + IN BOOLEAN CacheEn; ///< Indicates whether cache should + /// be enabled +} AGESA_HALT_THIS_AP_PARAMS; + /// VoltageType values typedef enum { VTYPE_CPU_VREF, ///< Cpu side Vref @@ -2625,6 +2638,12 @@ AgesaIdleAnAp ( ); AGESA_STATUS +AgesaHaltThisAp ( + IN UINTN FcnData, + IN AGESA_HALT_THIS_AP_PARAMS *HaltApParams +); + +AGESA_STATUS AgesaHookBeforeDramInit ( IN UINTN SocketIdModuleId, IN OUT MEM_DATA_STRUCT *MemData |