diff options
45 files changed, 23 insertions, 130 deletions
diff --git a/src/mainboard/apple/macbookair4_2/romstage.c b/src/mainboard/apple/macbookair4_2/romstage.c index a7c543dd4952..5522ea013e52 100644 --- a/src/mainboard/apple/macbookair4_2/romstage.c +++ b/src/mainboard/apple/macbookair4_2/romstage.c @@ -27,7 +27,7 @@ void pch_enable_lpc(void) pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xac, 0x80000000); } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { /* Disable devices. */ RCBA32(0x3414) = 0x00000020; diff --git a/src/mainboard/asrock/b75pro3-m/romstage.c b/src/mainboard/asrock/b75pro3-m/romstage.c index fe6d1833d26c..fe1416b908d7 100644 --- a/src/mainboard/asrock/b75pro3-m/romstage.c +++ b/src/mainboard/asrock/b75pro3-m/romstage.c @@ -27,10 +27,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 0 }, { 1, 0, 0 }, diff --git a/src/mainboard/asus/h61m-cs/romstage.c b/src/mainboard/asus/h61m-cs/romstage.c index 37b07e51d9c5..4c8eda74fef6 100644 --- a/src/mainboard/asus/h61m-cs/romstage.c +++ b/src/mainboard/asus/h61m-cs/romstage.c @@ -31,10 +31,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 0 }, { 1, 0, 0 }, diff --git a/src/mainboard/asus/maximus_iv_gene-z/romstage.c b/src/mainboard/asus/maximus_iv_gene-z/romstage.c index 6cf206b47c8a..e29dd0f160e3 100644 --- a/src/mainboard/asus/maximus_iv_gene-z/romstage.c +++ b/src/mainboard/asus/maximus_iv_gene-z/romstage.c @@ -44,10 +44,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - void mainboard_config_superio(void) { static const pnp_devfn_t GLOBAL_PSEUDO_DEV = PNP_DEV(0x2e, 0); diff --git a/src/mainboard/asus/p8h61-m_lx/romstage.c b/src/mainboard/asus/p8h61-m_lx/romstage.c index 5f94d17cf4e5..01ae6030ad48 100644 --- a/src/mainboard/asus/p8h61-m_lx/romstage.c +++ b/src/mainboard/asus/p8h61-m_lx/romstage.c @@ -47,10 +47,6 @@ void pch_enable_lpc(void) CNF1_LPC_EN | KBC_LPC_EN | LPT_LPC_EN | COMA_LPC_EN); } -void mainboard_rcba_config(void) -{ -} - void mainboard_config_superio(void) { nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/asus/p8h61-m_pro/romstage.c b/src/mainboard/asus/p8h61-m_pro/romstage.c index 60d311d98c52..3736ab6b6584 100644 --- a/src/mainboard/asus/p8h61-m_pro/romstage.c +++ b/src/mainboard/asus/p8h61-m_pro/romstage.c @@ -32,10 +32,6 @@ void pch_enable_lpc(void) KBC_LPC_EN | LPT_LPC_EN | COMA_LPC_EN); } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 0 }, { 1, 0, 0 }, diff --git a/src/mainboard/asus/p8z77-m_pro/romstage.c b/src/mainboard/asus/p8z77-m_pro/romstage.c index db2d303e8c7e..5fff2e143c36 100644 --- a/src/mainboard/asus/p8z77-m_pro/romstage.c +++ b/src/mainboard/asus/p8z77-m_pro/romstage.c @@ -34,10 +34,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { /* {enable, current, oc_pin} */ { 1, 2, 0 }, /* Port 0: USB3 front internal header, top */ diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c index 8198d8af6e36..f44a7e8edd3f 100644 --- a/src/mainboard/compulab/intense_pc/romstage.c +++ b/src/mainboard/compulab/intense_pc/romstage.c @@ -39,7 +39,7 @@ void pch_enable_lpc(void) #endif } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { RCBA32(0x3414) = 0x00000000; } diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c index f67d51b8be69..25e1d0385ea9 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c +++ b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c @@ -87,7 +87,7 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only) read_spd(&spd[3], 0x53, id_only); } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { /* Enable HECI */ RCBA32(FD2) &= ~0x2; diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c index 1df5bfd80c96..57cc0706d94b 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c @@ -27,10 +27,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 0 }, { 1, 0, 0 }, diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 449ccf507e3b..3aef9d0a09b9 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -35,7 +35,7 @@ void pch_enable_lpc(void) pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN); } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { u32 reg32; diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index d42572b63234..628e2a00526a 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -39,7 +39,7 @@ void pch_enable_lpc(void) GAMEL_LPC_EN | COMA_LPC_EN); } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { /* * GFX INTA -> PIRQA (MSI) diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 8893819446c2..604cf7b284c3 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -30,7 +30,7 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { u32 reg32; diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 6690c6863c58..cbbae2ee0792 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -43,7 +43,7 @@ void pch_enable_lpc(void) CNF1_LPC_EN | FDD_LPC_EN); } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { u32 reg32; diff --git a/src/mainboard/hp/2570p/romstage.c b/src/mainboard/hp/2570p/romstage.c index 4f7ca3a18cd4..8d36f6b27def 100644 --- a/src/mainboard/hp/2570p/romstage.c +++ b/src/mainboard/hp/2570p/romstage.c @@ -24,10 +24,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 1, 0 }, { 0, 1, 0 }, diff --git a/src/mainboard/hp/2760p/romstage.c b/src/mainboard/hp/2760p/romstage.c index a696faec36a4..5bf878961801 100644 --- a/src/mainboard/hp/2760p/romstage.c +++ b/src/mainboard/hp/2760p/romstage.c @@ -23,10 +23,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 1, 0 }, { 1, 1, 0 }, diff --git a/src/mainboard/hp/8460p/romstage.c b/src/mainboard/hp/8460p/romstage.c index 77c355bb231f..397810eba7e8 100644 --- a/src/mainboard/hp/8460p/romstage.c +++ b/src/mainboard/hp/8460p/romstage.c @@ -27,10 +27,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 1, 0 }, /* USB0, eSATA */ { 1, 0, 0 }, /* USB charger */ diff --git a/src/mainboard/hp/8470p/romstage.c b/src/mainboard/hp/8470p/romstage.c index 890e65b07cf4..513b3756e860 100644 --- a/src/mainboard/hp/8470p/romstage.c +++ b/src/mainboard/hp/8470p/romstage.c @@ -26,10 +26,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 1, 0 }, { 1, 1, 0 }, diff --git a/src/mainboard/hp/8770w/romstage.c b/src/mainboard/hp/8770w/romstage.c index 49a5b1af4846..d3034fb5650a 100644 --- a/src/mainboard/hp/8770w/romstage.c +++ b/src/mainboard/hp/8770w/romstage.c @@ -27,10 +27,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 1, 0 }, /* Dock USB3.0 */ { 1, 1, 0 }, /* Conn */ diff --git a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c index 90cfcc93aa9e..3e726cfb808c 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c +++ b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c @@ -31,10 +31,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, -1 }, { 1, 0, -1 }, diff --git a/src/mainboard/hp/folio_9470m/romstage.c b/src/mainboard/hp/folio_9470m/romstage.c index 3f174a19fb7f..969b666d8fd7 100644 --- a/src/mainboard/hp/folio_9470m/romstage.c +++ b/src/mainboard/hp/folio_9470m/romstage.c @@ -25,10 +25,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 1, 0 }, /* SSP1: dock */ { 1, 1, 0 }, /* SSP2: left, EHCI Debug */ diff --git a/src/mainboard/hp/revolve_810_g1/romstage.c b/src/mainboard/hp/revolve_810_g1/romstage.c index 8a40578f0ac9..844bb2f4e353 100644 --- a/src/mainboard/hp/revolve_810_g1/romstage.c +++ b/src/mainboard/hp/revolve_810_g1/romstage.c @@ -28,7 +28,7 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { RCBA32(BUC) = 0x00000000; } diff --git a/src/mainboard/hp/z220_sff_workstation/romstage.c b/src/mainboard/hp/z220_sff_workstation/romstage.c index bd0a377580fa..2e0a50806c97 100644 --- a/src/mainboard/hp/z220_sff_workstation/romstage.c +++ b/src/mainboard/hp/z220_sff_workstation/romstage.c @@ -31,10 +31,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 0 }, { 1, 0, 0 }, diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c index 7f3a58d0f25d..1cd58b0ba5df 100644 --- a/src/mainboard/intel/dcp847ske/early_southbridge.c +++ b/src/mainboard/intel/dcp847ske/early_southbridge.c @@ -31,7 +31,7 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { /* Disable devices */ RCBA32(FD) |= PCH_DISABLE_P2P | PCH_DISABLE_XHCI; diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index e7959ef32f60..16a16de33f88 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -43,11 +43,6 @@ void pch_enable_lpc(void) } } -void mainboard_rcba_config(void) -{ - southbridge_configure_default_intmap(); -} - void mainboard_config_superio(void) { const u16 port = SIO_PORT; diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index f778f9643299..37713e1657b7 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -43,7 +43,7 @@ void pch_enable_lpc(void) COMA_LPC_EN | COMB_LPC_EN); } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { u32 reg32; diff --git a/src/mainboard/lenovo/l520/romstage.c b/src/mainboard/lenovo/l520/romstage.c index fc67e5adcf76..37182f855d56 100644 --- a/src/mainboard/lenovo/l520/romstage.c +++ b/src/mainboard/lenovo/l520/romstage.c @@ -26,10 +26,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, -1 }, { 1, 0, -1 }, diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c index 48d26c251945..ee1d0ed19ccc 100644 --- a/src/mainboard/lenovo/s230u/romstage.c +++ b/src/mainboard/lenovo/s230u/romstage.c @@ -42,7 +42,7 @@ void pch_enable_lpc(void) ec_mm_set_bit(0x3b, 4); } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { /* Disable devices. */ RCBA32(BUC) = 0x00000020; diff --git a/src/mainboard/lenovo/t420/romstage.c b/src/mainboard/lenovo/t420/romstage.c index e7851f3edbfc..7036ec40fe9b 100644 --- a/src/mainboard/lenovo/t420/romstage.c +++ b/src/mainboard/lenovo/t420/romstage.c @@ -54,10 +54,6 @@ void pch_enable_lpc(void) pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); } -void mainboard_rcba_config(void) -{ -} - // OC3 set in bios to port 2-7, OC7 set in bios to port 10-13 const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 1, 0 }, /* P0: system port 4, OC0 */ diff --git a/src/mainboard/lenovo/t420s/romstage.c b/src/mainboard/lenovo/t420s/romstage.c index 72cbcad2459f..7b97ff7e75bd 100644 --- a/src/mainboard/lenovo/t420s/romstage.c +++ b/src/mainboard/lenovo/t420s/romstage.c @@ -54,10 +54,6 @@ void pch_enable_lpc(void) pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 0, 1, -1 }, /* P0 empty */ { 1, 1, 1 }, /* P1 system port 2 (To system port) (EHCI debug), OC 1 */ diff --git a/src/mainboard/lenovo/t430/romstage.c b/src/mainboard/lenovo/t430/romstage.c index 3caa443fe949..0cff5d2b59b7 100644 --- a/src/mainboard/lenovo/t430/romstage.c +++ b/src/mainboard/lenovo/t430/romstage.c @@ -53,10 +53,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - /* FIXME: used T530 values here */ const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 1, 0 }, diff --git a/src/mainboard/lenovo/t430s/romstage.c b/src/mainboard/lenovo/t430s/romstage.c index 34793d130153..298673b5dd9f 100644 --- a/src/mainboard/lenovo/t430s/romstage.c +++ b/src/mainboard/lenovo/t430s/romstage.c @@ -24,10 +24,6 @@ void pch_enable_lpc(void) pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); } -void mainboard_rcba_config(void) -{ -} - void mainboard_config_superio(void) { } diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c index 75e331e6d41b..52898faa4524 100644 --- a/src/mainboard/lenovo/t520/romstage.c +++ b/src/mainboard/lenovo/t520/romstage.c @@ -56,10 +56,6 @@ void pch_enable_lpc(void) pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 1, 0 }, /* P0 left dual conn, OC 0 */ { 1, 1, 1 }, /* P1 system onboard USB (eSATA), (EHCI debug), OC 1 */ diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c index cb17a27dda6e..e0b0455c757b 100644 --- a/src/mainboard/lenovo/t530/romstage.c +++ b/src/mainboard/lenovo/t530/romstage.c @@ -56,10 +56,6 @@ void pch_enable_lpc(void) pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); } -void mainboard_rcba_config(void) -{ -} - void mainboard_early_init(int s3resume) { hybrid_graphics_init(); diff --git a/src/mainboard/lenovo/x131e/romstage.c b/src/mainboard/lenovo/x131e/romstage.c index 6f176c78f782..a1d3e88ad71c 100644 --- a/src/mainboard/lenovo/x131e/romstage.c +++ b/src/mainboard/lenovo/x131e/romstage.c @@ -24,10 +24,6 @@ void pch_enable_lpc(void) { } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { {1, 1, 0}, /* P0: USB 3.0 1 (OC0) */ {1, 1, 0}, /* P1: USB 3.0 2 (OC0) */ diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c index eb2a5b19f5eb..f4d2a3c70aa2 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c +++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c @@ -68,10 +68,6 @@ static uint8_t *get_spd_data(int spd_index) return spd_file + spd_index * 256; } -void mainboard_rcba_config(void) -{ -} - void mainboard_get_spd(spd_raw_data *spd, bool id_only) { uint8_t *memory; diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c index 8460208ddbf4..7989fd6298ef 100644 --- a/src/mainboard/lenovo/x220/romstage.c +++ b/src/mainboard/lenovo/x220/romstage.c @@ -32,10 +32,6 @@ void pch_enable_lpc(void) pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); } -void mainboard_rcba_config(void) -{ -} - void mainboard_fill_pei_data(struct pei_data *pei_data) { struct pei_data pei_data_template = { diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c index 6f1013567b09..3e9ea2c3717c 100644 --- a/src/mainboard/lenovo/x230/romstage.c +++ b/src/mainboard/lenovo/x230/romstage.c @@ -29,10 +29,6 @@ void pch_enable_lpc(void) pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 0 }, /* P0 (left, fan side), OC 0 */ { 1, 0, 1 }, /* P1 (left touchpad side), OC 1 */ diff --git a/src/mainboard/msi/ms7707/romstage.c b/src/mainboard/msi/ms7707/romstage.c index 8f83c8684c1f..399d44b2a47b 100644 --- a/src/mainboard/msi/ms7707/romstage.c +++ b/src/mainboard/msi/ms7707/romstage.c @@ -28,10 +28,6 @@ void pch_enable_lpc(void) pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xa4, reg16); } -void mainboard_rcba_config(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { {1, 0, 0}, {1, 0, 0}, diff --git a/src/mainboard/roda/rv11/romstage.c b/src/mainboard/roda/rv11/romstage.c index a54a9ad6cef3..f1681384a87d 100644 --- a/src/mainboard/roda/rv11/romstage.c +++ b/src/mainboard/roda/rv11/romstage.c @@ -16,7 +16,7 @@ #include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { u32 reg32; diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index d4b6dd834bf6..ddcf2ad9e6fc 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -51,7 +51,7 @@ void pch_enable_lpc(void) #endif } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { /* * GFX INTA -> PIRQA (MSI) diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 77fd16016dee..06659978e597 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -62,7 +62,7 @@ void pch_enable_lpc(void) #endif } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { /* * GFX INTA -> PIRQA (MSI) diff --git a/src/mainboard/sapphire/pureplatinumh61/romstage.c b/src/mainboard/sapphire/pureplatinumh61/romstage.c index 7fcde773b106..3c9cc829d759 100644 --- a/src/mainboard/sapphire/pureplatinumh61/romstage.c +++ b/src/mainboard/sapphire/pureplatinumh61/romstage.c @@ -26,7 +26,7 @@ void pch_enable_lpc(void) pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xac, 0x00010000); } -void mainboard_rcba_config(void) +void mainboard_late_rcba_config(void) { /* Disable devices. */ RCBA32(0x3414) = 0x00000020; diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index 92882b4b6150..c76d2f4f4a56 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -34,6 +34,10 @@ __weak void mainboard_early_init(int s3_resume) { } +__weak void mainboard_late_rcba_config(void) +{ +} + static void early_pch_reset_pmcon(void) { u8 reg8; @@ -100,7 +104,7 @@ void mainboard_romstage_entry(void) southbridge_configure_default_intmap(); southbridge_rcba_config(); - mainboard_rcba_config(); + mainboard_late_rcba_config(); post_code(0x3d); diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index ac976c29821d..d4cd86eaa518 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -72,7 +72,9 @@ int smbus_read_byte(unsigned int device, unsigned int address); void early_thermal_init(void); void southbridge_configure_default_intmap(void); void southbridge_rcba_config(void); -void mainboard_rcba_config(void); +/* Optional mainboard hook to do additional configuration + on the RCBA config space. It is called after the raminit. */ +void mainboard_late_rcba_config(void); void early_pch_init_native(void); void early_pch_init(void); void early_pch_init_native_dmi_pre(void); |