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Diffstat (limited to 'src/include/device/dram/ddr3.h')
-rw-r--r--src/include/device/dram/ddr3.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h
index 6efe0494dfbf..c4fd253efd5b 100644
--- a/src/include/device/dram/ddr3.h
+++ b/src/include/device/dram/ddr3.h
@@ -27,12 +27,12 @@
*
* @{
*/
-#define SPD_DIMM_MOD_ID1 117
-#define SPD_DIMM_MOD_ID2 118
-#define SPD_DIMM_SERIAL_NUM 122
-#define SPD_DIMM_SERIAL_LEN 4
-#define SPD_DIMM_PART_NUM 128
-#define SPD_DIMM_PART_LEN 18
+#define SPD_DDR3_MOD_ID1 117
+#define SPD_DDR3_MOD_ID2 118
+#define SPD_DDR3_SERIAL_NUM 122
+#define SPD_DDR3_SERIAL_LEN 4
+#define SPD_DDR3_PART_NUM 128
+#define SPD_DDR3_PART_LEN 18
/** @} */
/* Byte 3 [3:0]: DDR3 Module type information */
@@ -145,7 +145,7 @@ struct dimm_attr_ddr3_st {
/* ASCII part number - NULL terminated */
u8 part_number[17];
/* Serial number */
- u8 serial[SPD_DIMM_SERIAL_LEN];
+ u8 serial[SPD_DDR3_SERIAL_LEN];
};
enum ddr3_xmp_profile {
@@ -153,15 +153,15 @@ enum ddr3_xmp_profile {
DDR3_XMP_PROFILE_2 = 1,
};
-typedef u8 spd_raw_data[256];
+typedef u8 spd_ddr3_raw_data[SPD_SIZE_MAX_DDR3];
u16 spd_ddr3_calc_crc(u8 *spd, int len);
u16 spd_ddr3_calc_unique_crc(u8 *spd, int len);
-int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_raw_data spd_data);
+int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_ddr3_raw_data spd_data);
int spd_dimm_is_registered_ddr3(enum spd_dimm_type_ddr3 type);
void dram_print_spd_ddr3(const struct dimm_attr_ddr3_st *dimm);
int spd_xmp_decode_ddr3(struct dimm_attr_ddr3_st *dimm,
- spd_raw_data spd,
+ spd_ddr3_raw_data spd,
enum ddr3_xmp_profile profile);
enum cb_err spd_add_smbios17(const u8 channel, const u8 slot,
const u16 selected_freq,