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-rw-r--r--src/mainboard/google/rex/variants/baseboard/ovis/Makefile.inc2
-rw-r--r--src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c28
2 files changed, 30 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/Makefile.inc b/src/mainboard/google/rex/variants/baseboard/ovis/Makefile.inc
index fd45b948ff46..bb3620adae7c 100644
--- a/src/mainboard/google/rex/variants/baseboard/ovis/Makefile.inc
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/Makefile.inc
@@ -1 +1,3 @@
romstage-y += memory.c
+
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c b/src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c
new file mode 100644
index 000000000000..5955b2adc416
--- /dev/null
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <device/pci_ids.h>
+#include <intelblocks/power_limit.h>
+
+/*
+ * SKU_ID, TDP (Watts), pl1_min (milliWatts), pl1_max (milliWatts),
+ * pl2_min (milliWatts), pl2_max (milliWatts), pl4 (milliWatts)
+ * Following values are for performance config as per document #640982
+ */
+const struct cpu_tdp_power_limits limits[] = {
+ {
+ .mch_id = PCI_DID_INTEL_MTL_P_ID_1,
+ .cpu_tdp = 28,
+ .pl1_min_power = 19000,
+ .pl1_max_power = 28000,
+ .pl2_min_power = 64000,
+ .pl2_max_power = 64000,
+ .pl4_power = 120000
+ },
+};
+
+void variant_devtree_update(void)
+{
+ size_t total_entries = ARRAY_SIZE(limits);
+ variant_update_cpu_power_limits(limits, total_entries);
+}