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-rw-r--r--src/mainboard/lenovo/t520/variants/t520/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/t520/variants/t520/devicetree.cb b/src/mainboard/lenovo/t520/variants/t520/devicetree.cb
index eff2d6930455..7893daf9ec32 100644
--- a/src/mainboard/lenovo/t520/variants/t520/devicetree.cb
+++ b/src/mainboard/lenovo/t520/variants/t520/devicetree.cb
@@ -63,7 +63,6 @@ chip northbridge/intel/sandybridge
register "pcie_port_coalesce" = "1"
register "c2_latency" = "101" # c2 not supported
- register "p_cnt_throttling_supported" = "1"
register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"