summaryrefslogtreecommitdiffstats
path: root/src/mainboard/lenovo/x131e/devicetree.cb
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/lenovo/x131e/devicetree.cb')
-rw-r--r--src/mainboard/lenovo/x131e/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/x131e/devicetree.cb b/src/mainboard/lenovo/x131e/devicetree.cb
index 21d38f5ab24f..2a98a60cac03 100644
--- a/src/mainboard/lenovo/x131e/devicetree.cb
+++ b/src/mainboard/lenovo/x131e/devicetree.cb
@@ -66,7 +66,6 @@ chip northbridge/intel/sandybridge
# Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "1"
register "c2_latency" = "0x0065"
- register "p_cnt_throttling_supported" = "1"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"