4 files changed, 22 insertions, 8 deletions
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c
index c6cdd668b731..22b936c83982 100644
--- a/src/mainboard/samsung/lumpy/chromeos.c
+++ b/src/mainboard/samsung/lumpy/chromeos.c
@@ -19,9 +19,6 @@
 
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);
-	u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1);
-
 	struct lb_gpio chromeos_gpios[] = {
 		/* Recovery: GPIO42 = CHP3_REC_MODE# */
 		{GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(),
@@ -30,7 +27,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 		{100, ACTIVE_HIGH, get_lid_switch(), "lid"},
 
 		/* Power Button */
-		{101, ACTIVE_LOW, (gen_pmcon_1 >> 9) & 1, "power"},
+		{101, ACTIVE_LOW, get_power_switch(), "power"},
 
 		/* Did we load the VGA Option ROM? */
 		/* -1 indicates that this is a pseudo GPIO */
@@ -54,6 +51,13 @@ int get_lid_switch(void)
 	return ec_read(0x83) & 1;
 }
 
+int get_power_switch(void)
+{
+	const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);
+	u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1);
+	return (gen_pmcon_1 >> 9) & 1;
+}
+
 int get_write_protect_state(void)
 {
 	const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
diff --git a/src/mainboard/samsung/lumpy/onboard.h b/src/mainboard/samsung/lumpy/onboard.h
index d43e1bae775e..dd570762e2f5 100644
--- a/src/mainboard/samsung/lumpy/onboard.h
+++ b/src/mainboard/samsung/lumpy/onboard.h
@@ -18,4 +18,8 @@
 /* Recovery: GPIO42 = CHP3_REC_MODE#, active low */
 #define GPIO_REC_MODE	42
 
+#ifndef __ACPI__
+int get_power_switch(void);
+#endif
+
 #endif
diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c
index 1ed5d28cad60..b845a9172c5f 100644
--- a/src/mainboard/samsung/stumpy/chromeos.c
+++ b/src/mainboard/samsung/stumpy/chromeos.c
@@ -15,9 +15,6 @@
 
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);
-	u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1);
-
 	struct lb_gpio chromeos_gpios[] = {
 		/* Recovery: GPIO42 = CHP3_REC_MODE# */
 		{GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(),
@@ -27,7 +24,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 		{100, ACTIVE_HIGH, 1, "lid"},
 
 		/* Power Button */
-		{101, ACTIVE_LOW, (gen_pmcon_1 >> 9) & 1, "power"},
+		{101, ACTIVE_LOW, get_power_switch(), "power"},
 
 		/* Did we load the VGA Option ROM? */
 		/* -1 indicates that this is a pseudo GPIO */
@@ -46,6 +43,13 @@ static bool raw_recovery_mode_switch(void)
 	return !get_gpio(GPIO_REC_MODE);
 }
 
+int get_power_switch(void)
+{
+	const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);
+	u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1);
+	return (gen_pmcon_1 >> 9) & 1;
+}
+
 int get_write_protect_state(void)
 {
 	const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
diff --git a/src/mainboard/samsung/stumpy/onboard.h b/src/mainboard/samsung/stumpy/onboard.h
index 602d456636a2..b89c20c18cb8 100644
--- a/src/mainboard/samsung/stumpy/onboard.h
+++ b/src/mainboard/samsung/stumpy/onboard.h
@@ -9,4 +9,6 @@
 /* Write Protect: GPIO68 = CHP3_SPI_WP, active high */
 #define GPIO_SPI_WP	68
 
+int get_power_switch(void);
+
 #endif