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-rw-r--r--src/mainboard/google/brya/romstage.c3
-rw-r--r--src/mainboard/google/deltaur/romstage.c3
-rw-r--r--src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h2
-rw-r--r--src/mainboard/google/deltaur/variants/deltan/memory.c4
-rw-r--r--src/mainboard/google/deltaur/variants/deltaur/memory.c4
-rw-r--r--src/mainboard/google/volteer/romstage.c3
-rw-r--r--src/mainboard/intel/adlrvp/romstage_fsp_params.c4
-rw-r--r--src/mainboard/intel/shadowmountain/romstage.c3
-rw-r--r--src/mainboard/intel/tglrvp/romstage_fsp_params.c4
-rw-r--r--src/mainboard/prodrive/atlas/romstage_fsp_params.c3
-rw-r--r--src/mainboard/starlabs/labtop/variants/tgl/romstage.c2
-rw-r--r--src/mainboard/system76/darp7/romstage.c2
-rw-r--r--src/mainboard/system76/galp5/romstage.c2
-rw-r--r--src/mainboard/system76/gaze16/romstage.c2
-rw-r--r--src/mainboard/system76/lemp10/romstage.c2
-rw-r--r--src/mainboard/system76/oryp8/romstage.c2
16 files changed, 19 insertions, 26 deletions
diff --git a/src/mainboard/google/brya/romstage.c b/src/mainboard/google/brya/romstage.c
index a00cf32a839a..256084030789 100644
--- a/src/mainboard/google/brya/romstage.c
+++ b/src/mainboard/google/brya/romstage.c
@@ -9,7 +9,6 @@
void mainboard_memory_init_params(FSPM_UPD *memupd)
{
- FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;
const struct mb_cfg *mem_config = variant_memory_params();
bool half_populated = variant_is_half_populated();
struct mem_spd spd_info;
@@ -21,7 +20,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
const struct pad_config *pads;
size_t pads_num;
- memcfg_init(m_cfg, mem_config, &spd_info, half_populated, &dimms_changed);
+ memcfg_init(memupd, mem_config, &spd_info, half_populated, &dimms_changed);
if (dimms_changed) {
memupd->FspmArchUpd.NvsBufferPtr = 0;
memupd->FspmArchUpd.BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION;
diff --git a/src/mainboard/google/deltaur/romstage.c b/src/mainboard/google/deltaur/romstage.c
index c04f6fb1a935..f9d71a8388ca 100644
--- a/src/mainboard/google/deltaur/romstage.c
+++ b/src/mainboard/google/deltaur/romstage.c
@@ -5,6 +5,5 @@
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
- FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
- variant_memory_init(mem_cfg);
+ variant_memory_init(mupd);
}
diff --git a/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h
index 7a4ed08f5902..6804ef6b19d7 100644
--- a/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h
@@ -19,7 +19,7 @@ const struct pad_config *variant_override_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
const struct mb_cfg *variant_memory_params(void);
-void variant_memory_init(FSP_M_CONFIG *mem_cfg);
+void variant_memory_init(FSPM_UPD *mupd);
/* SKU ID structure */
typedef struct {
diff --git a/src/mainboard/google/deltaur/variants/deltan/memory.c b/src/mainboard/google/deltaur/variants/deltan/memory.c
index caa99a9b0109..37c21cc04522 100644
--- a/src/mainboard/google/deltaur/variants/deltan/memory.c
+++ b/src/mainboard/google/deltaur/variants/deltan/memory.c
@@ -61,7 +61,7 @@ static const struct mb_cfg baseboard_memcfg = {
.ect = false, /* Disable Early Command Training */
};
-void variant_memory_init(FSP_M_CONFIG *mem_cfg)
+void variant_memory_init(FSPM_UPD *mupd)
{
const struct mem_spd spd_info = {
.topo = MEM_TOPO_DIMM_MODULE,
@@ -77,5 +77,5 @@ void variant_memory_init(FSP_M_CONFIG *mem_cfg)
new_board_cfg_ddr4.ddr4_config.dq_pins_interleaved = gpio_get(MEMORY_INTERLEAVED);
- memcfg_init(mem_cfg, &new_board_cfg_ddr4, &spd_info, half_populated);
+ memcfg_init(mupd, &new_board_cfg_ddr4, &spd_info, half_populated);
}
diff --git a/src/mainboard/google/deltaur/variants/deltaur/memory.c b/src/mainboard/google/deltaur/variants/deltaur/memory.c
index f8506df54b3b..a2037a84cf35 100644
--- a/src/mainboard/google/deltaur/variants/deltaur/memory.c
+++ b/src/mainboard/google/deltaur/variants/deltaur/memory.c
@@ -77,7 +77,7 @@ static int variant_memory_sku(void)
return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
}
-void variant_memory_init(FSP_M_CONFIG *mem_cfg)
+void variant_memory_init(FSPM_UPD *mupd)
{
const struct mb_cfg *board_cfg = variant_memory_params();
const struct mem_spd spd_info = {
@@ -85,5 +85,5 @@ void variant_memory_init(FSP_M_CONFIG *mem_cfg)
.cbfs_index = variant_memory_sku(),
};
const bool half_populated = false;
- memcfg_init(mem_cfg, board_cfg, &spd_info, half_populated);
+ memcfg_init(mupd, board_cfg, &spd_info, half_populated);
}
diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c
index 8cde5da88bfa..f9e507cdcc65 100644
--- a/src/mainboard/google/volteer/romstage.c
+++ b/src/mainboard/google/volteer/romstage.c
@@ -13,7 +13,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
- FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
const struct mb_cfg *board_cfg = variant_memory_params();
const struct mem_spd spd_info = {
.topo = MEM_TOPO_MEMORY_DOWN,
@@ -21,7 +20,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
bool half_populated = gpio_get(GPIO_MEM_CH_SEL);
- memcfg_init(mem_cfg, board_cfg, &spd_info, half_populated);
+ memcfg_init(mupd, board_cfg, &spd_info, half_populated);
memcfg_variant_init(mupd);
}
diff --git a/src/mainboard/intel/adlrvp/romstage_fsp_params.c b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
index 5b5cc6b29519..8a24529f4965 100644
--- a/src/mainboard/intel/adlrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
@@ -73,7 +73,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
case ADL_P_DDR4_1:
case ADL_P_DDR4_2:
case ADL_P_DDR5_1:
- memcfg_init(m_cfg, mem_config, &dimm_module_spd_info, half_populated,
+ memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated,
&dimms_changed);
break;
case ADL_P_DDR5_2:
@@ -84,7 +84,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
case ADL_M_LP4:
case ADL_M_LP5:
case ADL_N_LP5:
- memcfg_init(m_cfg, mem_config, &memory_down_spd_info, half_populated,
+ memcfg_init(memupd, mem_config, &memory_down_spd_info, half_populated,
&dimms_changed);
break;
default:
diff --git a/src/mainboard/intel/shadowmountain/romstage.c b/src/mainboard/intel/shadowmountain/romstage.c
index 0951936bdcd5..eb08d18eedb9 100644
--- a/src/mainboard/intel/shadowmountain/romstage.c
+++ b/src/mainboard/intel/shadowmountain/romstage.c
@@ -9,7 +9,6 @@
void mainboard_memory_init_params(FSPM_UPD *memupd)
{
- FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;
const struct mb_cfg *mem_config = variant_memory_params();
const bool half_populated = false;
bool dimms_changed = false;
@@ -19,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
.cbfs_index = variant_memory_sku(),
};
- memcfg_init(m_cfg, mem_config, &lp5_spd_info, half_populated, &dimms_changed);
+ memcfg_init(memupd, mem_config, &lp5_spd_info, half_populated, &dimms_changed);
}
diff --git a/src/mainboard/intel/tglrvp/romstage_fsp_params.c b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
index 33415684edf2..22859f62e6ab 100644
--- a/src/mainboard/intel/tglrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
@@ -40,8 +40,6 @@ static uintptr_t mainboard_get_spd_index(void)
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
- FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
-
const struct mb_cfg *mem_config = variant_memory_params();
const struct mem_spd spd_info = {
.topo = MEM_TOPO_MEMORY_DOWN,
@@ -49,6 +47,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
bool half_populated = false;
- memcfg_init(mem_cfg, mem_config, &spd_info, half_populated);
+ memcfg_init(mupd, mem_config, &spd_info, half_populated);
}
diff --git a/src/mainboard/prodrive/atlas/romstage_fsp_params.c b/src/mainboard/prodrive/atlas/romstage_fsp_params.c
index 9728a99a4f35..fae7100b3126 100644
--- a/src/mainboard/prodrive/atlas/romstage_fsp_params.c
+++ b/src/mainboard/prodrive/atlas/romstage_fsp_params.c
@@ -29,7 +29,6 @@ static const struct mb_cfg ddr5_mem_config = {
void mainboard_memory_init_params(FSPM_UPD *memupd)
{
- FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;
const struct mb_cfg *mem_config = &ddr5_mem_config;
const bool half_populated = false;
bool dimms_changed = false;
@@ -48,5 +47,5 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
},
};
- memcfg_init(m_cfg, mem_config, &dimm_module_spd_info, half_populated, &dimms_changed);
+ memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated, &dimms_changed);
}
diff --git a/src/mainboard/starlabs/labtop/variants/tgl/romstage.c b/src/mainboard/starlabs/labtop/variants/tgl/romstage.c
index 1d65c61ba558..fed6efc9e4cd 100644
--- a/src/mainboard/starlabs/labtop/variants/tgl/romstage.c
+++ b/src/mainboard/starlabs/labtop/variants/tgl/romstage.c
@@ -25,7 +25,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
},
};
- memcfg_init(&mupd->FspmConfig, &mem_config, &ddr4_spd_info, half_populated);
+ memcfg_init(mupd, &mem_config, &ddr4_spd_info, half_populated);
const uint8_t vtd = get_uint_option("vtd", 1);
mupd->FspmConfig.VtdDisable = !vtd;
diff --git a/src/mainboard/system76/darp7/romstage.c b/src/mainboard/system76/darp7/romstage.c
index a72b647d370c..eb4fd3974bbb 100644
--- a/src/mainboard/system76/darp7/romstage.c
+++ b/src/mainboard/system76/darp7/romstage.c
@@ -18,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
const bool half_populated = false;
- memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated);
+ memcfg_init(mupd, &board_cfg, &spd_info, half_populated);
}
diff --git a/src/mainboard/system76/galp5/romstage.c b/src/mainboard/system76/galp5/romstage.c
index a72b647d370c..eb4fd3974bbb 100644
--- a/src/mainboard/system76/galp5/romstage.c
+++ b/src/mainboard/system76/galp5/romstage.c
@@ -18,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
const bool half_populated = false;
- memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated);
+ memcfg_init(mupd, &board_cfg, &spd_info, half_populated);
}
diff --git a/src/mainboard/system76/gaze16/romstage.c b/src/mainboard/system76/gaze16/romstage.c
index f46e83c65602..119c3f5d38e4 100644
--- a/src/mainboard/system76/gaze16/romstage.c
+++ b/src/mainboard/system76/gaze16/romstage.c
@@ -26,5 +26,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
const bool half_populated = false;
- memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated);
+ memcfg_init(mupd, &board_cfg, &spd_info, half_populated);
}
diff --git a/src/mainboard/system76/lemp10/romstage.c b/src/mainboard/system76/lemp10/romstage.c
index 6a916200b44a..749efe668f8f 100644
--- a/src/mainboard/system76/lemp10/romstage.c
+++ b/src/mainboard/system76/lemp10/romstage.c
@@ -18,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
const bool half_populated = false;
- memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated);
+ memcfg_init(mupd, &board_cfg, &spd_info, half_populated);
}
diff --git a/src/mainboard/system76/oryp8/romstage.c b/src/mainboard/system76/oryp8/romstage.c
index affe6369ccf2..64cc84406449 100644
--- a/src/mainboard/system76/oryp8/romstage.c
+++ b/src/mainboard/system76/oryp8/romstage.c
@@ -26,5 +26,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
// Enable M.2 PCIE 4.0 and PEG1
mupd->FspmConfig.CpuPcieRpEnableMask = 0x3;
- memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated);
+ memcfg_init(mupd, &board_cfg, &spd_info, half_populated);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 19:13:33 +0000