diff options
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r-- | src/northbridge/intel/e7505/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/gm45/acpi.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/gm45/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/gm45/romstage.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/acpi.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/i945/acpi.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/i945/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/ironlake/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/pineview/acpi.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/pineview/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/acpi.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/acpi.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/northbridge.c | 2 |
15 files changed, 19 insertions, 19 deletions
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c index 03230a53ae6f..e8944669a326 100644 --- a/src/northbridge/intel/e7505/northbridge.c +++ b/src/northbridge/intel/e7505/northbridge.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <console/console.h> #include <device/pci_ops.h> #include <stdint.h> diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index bdd0ed08228d..c81d21f0d0fd 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -3,8 +3,8 @@ #include <types.h> #include <console/console.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 5f6c8a1c4f51..d566120827ff 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -8,7 +8,7 @@ #include <stdint.h> #include <device/device.h> #include <boot/tables.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/intel/smm_reloc.h> #include "chip.h" diff --git a/src/northbridge/intel/gm45/romstage.c b/src/northbridge/intel/gm45/romstage.c index 5b68a7398a64..9bfb4e99bb6b 100644 --- a/src/northbridge/intel/gm45/romstage.c +++ b/src/northbridge/intel/gm45/romstage.c @@ -5,7 +5,7 @@ #include <romstage_handoff.h> #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/x86/lapic.h> #include <arch/romstage.h> #include <northbridge/intel/gm45/gm45.h> diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index f4d9d65421a1..a66847d6a9bb 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -3,7 +3,7 @@ #include <types.h> #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/device.h> #include <device/pci_ops.h> #include "haswell.h" diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index f7c688385281..552f032de51c 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -3,7 +3,7 @@ #include <commonlib/helpers.h> #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <stdint.h> #include <delay.h> #include <cpu/intel/haswell/haswell.h> diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c index e1258e04aad5..1c7eabcb5732 100644 --- a/src/northbridge/intel/i945/acpi.c +++ b/src/northbridge/intel/i945/acpi.c @@ -2,8 +2,8 @@ /* This file is part of the coreboot project. */ #include <types.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <device/device.h> #include <device/pci_ops.h> #include "i945.h" diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 3fd3db69df1e..c080d0cbd506 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -8,7 +8,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/intel/smm_reloc.h> #include "i945.h" diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index c1ee207bf1e1..7384223c0d55 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/pci_ops.h> #include <stdint.h> #include <delay.h> diff --git a/src/northbridge/intel/pineview/acpi.c b/src/northbridge/intel/pineview/acpi.c index 54c42cf481c4..cf91f1ea65a0 100644 --- a/src/northbridge/intel/pineview/acpi.c +++ b/src/northbridge/intel/pineview/acpi.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpigen.h> -#include <arch/acpi.h> +#include <acpi/acpigen.h> +#include <acpi/acpi.h> #include <device/device.h> #include <northbridge/intel/pineview/pineview.h> #include <types.h> diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index b24356361f46..af4bfb8ef59a 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -8,7 +8,7 @@ #include <stdint.h> #include <device/device.h> #include <boot/tables.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <northbridge/intel/pineview/pineview.h> #include <cpu/intel/smm_reloc.h> diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c index 77aa8149daf1..3ae44b8b3654 100644 --- a/src/northbridge/intel/sandybridge/acpi.c +++ b/src/northbridge/intel/sandybridge/acpi.c @@ -4,7 +4,7 @@ #include <types.h> #include <console/console.h> #include <commonlib/helpers.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/device.h> #include <device/pci_ops.h> #include "sandybridge.h" diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index ea2a737c2c65..e947bc56134c 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/pci_ops.h> #include <stdint.h> #include <delay.h> diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c index fb1ebab753ee..67fc93334b9b 100644 --- a/src/northbridge/intel/x4x/acpi.c +++ b/src/northbridge/intel/x4x/acpi.c @@ -3,8 +3,8 @@ #include <types.h> #include <console/console.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <device/device.h> #include "x4x.h" diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 054d2aa2edcc..8aab1f63bd57 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -8,7 +8,7 @@ #include <stdint.h> #include <device/device.h> #include <boot/tables.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <northbridge/intel/x4x/iomap.h> #include <northbridge/intel/x4x/chip.h> #include <northbridge/intel/x4x/x4x.h> |