diff options
Diffstat (limited to 'src/soc/intel/alderlake/Kconfig')
| -rw-r--r-- | src/soc/intel/alderlake/Kconfig | 96 |
1 files changed, 39 insertions, 57 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 508606961a22..ec6123db4817 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -34,6 +34,7 @@ config SOC_INTEL_ALDERLAKE select INTEL_GMA_VERSION_2 select INTEL_TXT_LIB select MP_SERVICES_PPI_V2 + select MRC_CACHE_USING_MRC_VERSION if SOC_INTEL_ALDERLAKE_PCH_N && !FSP_TYPE_IOT select MRC_SETTINGS_PROTECT select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_2 @@ -75,6 +76,7 @@ config SOC_INTEL_ALDERLAKE select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP + select SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE select SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC select SOC_INTEL_COMMON_BLOCK_VTD select SOC_INTEL_COMMON_BLOCK_XHCI @@ -82,9 +84,9 @@ config SOC_INTEL_ALDERLAKE select SOC_INTEL_COMMON_FSP_RESET select SOC_INTEL_COMMON_PCH_CLIENT select SOC_INTEL_COMMON_RESET - select SOC_INTEL_CSE_SEND_EOP_LATE if !BOARD_GOOGLE_BRYA_COMMON + select SOC_INTEL_CRASHLOG if MAINBOARD_HAS_CHROMEOS + select SOC_INTEL_CSE_SEND_EOP_LATE if !BOARD_GOOGLE_BRYA_COMMON && !BOARD_GOOGLE_BROX_COMMON select SOC_INTEL_CSE_SET_EOP - select SOC_INTEL_GFX_MBUS_JOIN if MAINBOARD_HAS_CHROMEOS && BMP_LOGO select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION select HAVE_INTEL_COMPLIANCE_TEST_MODE select SSE2 @@ -116,7 +118,7 @@ config SOC_INTEL_TWINLAKE config SOC_INTEL_ALDERLAKE_PCH_N bool - select HAVE_INTEL_FSP_REPO if !SOC_INTEL_TWINLAKE + select HAVE_INTEL_FSP_REPO if FSP_TYPE_IOT select SOC_INTEL_ALDERLAKE help Choose this option if your mainboard has a PCH-N chipset. @@ -146,6 +148,9 @@ config SOC_INTEL_RAPTORLAKE_PCH_S if SOC_INTEL_ALDERLAKE +config DIMM_SPD_SIZE + default 512 + config SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT bool default n if SOC_INTEL_ALDERLAKE_PCH_S @@ -186,12 +191,12 @@ config DCACHE_RAM_SIZE config DCACHE_BSP_STACK_SIZE hex - default 0x80400 + default 0x88000 help The amount of anticipated stack usage in CAR by bootblock and other stages. In the case of FSP_USES_CB_STACK default value will be sum of FSP-M stack requirement(512KiB) and CB romstage stack requirement - (~1KiB). + (~32KiB). config FSP_TEMP_RAM_SIZE hex @@ -394,47 +399,35 @@ config FSP_TYPE_IOT config FSP_HEADER_PATH string "Location of FSP headers" - default "src/vendorcode/intel/fsp/fsp2_0/twinlake/" if SOC_INTEL_TWINLAKE && !FSP_USE_REPO - default "src/vendorcode/intel/fsp/fsp2_0/alderlake_n/" if SOC_INTEL_ALDERLAKE_PCH_N && !FSP_USE_REPO - default "src/vendorcode/intel/fsp/fsp2_0/raptorlake/" if SOC_INTEL_RAPTORLAKE && !FSP_USE_REPO - default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/Include/" if SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT - default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE - default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S && SOC_INTEL_RAPTORLAKE - default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && FSP_TYPE_IOT - default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S && FSP_TYPE_IOT - default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && !SOC_INTEL_RAPTORLAKE - default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE - default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S - default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/" if SOC_INTEL_ALDERLAKE_PCH_N - default "src/vendorcode/intel/fsp/fsp2_0/alderlake/" if !FSP_USE_REPO + default "src/vendorcode/intel/fsp/fsp2_0/twinlake/" if !FSP_USE_REPO && SOC_INTEL_TWINLAKE + default "src/vendorcode/intel/fsp/fsp2_0/alderlake_n/" if !FSP_USE_REPO && SOC_INTEL_ALDERLAKE_PCH_N + default "src/vendorcode/intel/fsp/fsp2_0/raptorlake/" if !FSP_USE_REPO && SOC_INTEL_RAPTORLAKE + default "src/vendorcode/intel/fsp/fsp2_0/alderlake/" if !FSP_USE_REPO + default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/Include/" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE + default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/Include/" if FSP_TYPE_IOT && SOC_INTEL_RAPTORLAKE_PCH_S + default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Include/" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P + default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Include/" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_S + default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_N + default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P + default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S config FSP_FD_PATH string depends on FSP_USE_REPO - default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT - default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE - default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S && SOC_INTEL_RAPTORLAKE - default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && FSP_TYPE_IOT - default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S && FSP_TYPE_IOT - default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && !SOC_INTEL_RAPTORLAKE - default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE - default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S - default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_N - -config SOC_INTEL_ALDERLAKE_DEBUG_CONSENT - int "Debug Consent for ADL" - # USB DBC is more common for developers so make this default to 2 if - # SOC_INTEL_DEBUG_CONSENT=y + default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE + default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_RAPTORLAKE_PCH_S + default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P + default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_S + default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_N + default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P + default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S + +# Override platform debug consent value: +# 0:Disabled, 2:Enabled (All Probes+TraceHub), 6:Enable (Low Power), +# 7:Manual +config SOC_INTEL_COMMON_DEBUG_CONSENT + int default 2 if SOC_INTEL_DEBUG_CONSENT - default 0 - help - This is to control debug interface on SOC. - Setting non-zero value will allow to use DBC or DCI to debug SOC. - PlatformDebugConsent in FspmUpd.h has the details. - - Desired platform debug type are - 0:Disabled, 2:Enabled (All Probes+TraceHub), 6:Enable (Low Power), - 7:Manual config DATA_BUS_WIDTH int @@ -497,12 +490,6 @@ config SI_DESC_REGION_SZ help Size of Descriptor Region in the FMAP -config BUILDING_WITH_DEBUG_FSP - bool "Debug FSP is used for the build" - default n - help - Set this option if debug build of FSP is used. - config INTEL_GMA_BCLV_OFFSET default 0xc8258 @@ -515,18 +502,13 @@ config INTEL_GMA_BCLM_OFFSET config INTEL_GMA_BCLM_WIDTH default 32 +# Note: It cannot be disabled for ADL-P based platforms because ADL-P FSP relies on +# MBP HOB for ChipsetInit version for ChipsetInit sync. As ChipsetInit sync doesn't +# occur if no MBP HOB, so it results S0ix issue. This limitation is addressed in the +# later platforms so creation of MBP HOB can be skipped for ADL-N based platforms. config FSP_PUBLISH_MBP_HOB bool - default n if CHROMEOS && (SOC_INTEL_ALDERLAKE_PCH_N) - default y - help - This is to control creation of ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP. - Disabling it for the platforms, which do not use MBP HOB, can improve the boot time. - - Note: It cannot be disabled for ADL-P based platforms because ADL-P FSP relies on - MBP HOB for ChipsetInit version for ChipsetInit sync. As ChipsetInit sync doesn't - occur if no MBP HOB, so it results S0ix issue. This limitation is addressed in the - later platforms so creation of MBP HOB can be skipped for ADL-N based platforms. + default y if !SOC_INTEL_ALDERLAKE_PCH_N config INCLUDE_HSPHY_IN_FMAP bool "Include PCIe 5.0 HSPHY firmware in flash" |