diff options
Diffstat (limited to 'src/soc/intel/common/block/graphics/graphics.c')
| -rw-r--r-- | src/soc/intel/common/block/graphics/graphics.c | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index eabcb9a5a8ca..1606b96485c7 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -124,6 +124,21 @@ int fsp_soc_report_external_display(void) return graphics_get_framebuffer_address() && get_external_display_status(); } +static void configure_ddi_a_bifurcation(void) +{ + u32 ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A); + /* Only program if the buffer is not enabled yet. */ + if (ddi_buf_ctl & DDI_BUF_CTL_ENABLE) + return; + + if (CONFIG(SOC_INTEL_GFX_ENABLE_DDI_E_BIFURCATION)) + ddi_buf_ctl &= ~DDI_A_4_LANES; + else + ddi_buf_ctl |= DDI_A_4_LANES; + + graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl); +} + static void gma_init(struct device *const dev) { intel_gma_init_igd_opregion(); @@ -135,12 +150,8 @@ static void gma_init(struct device *const dev) if (!CONFIG(RUN_FSP_GOP)) graphics_soc_panel_init(dev); - if (CONFIG(SOC_INTEL_CONFIGURE_DDI_A_4_LANES) && !acpi_is_wakeup_s3()) { - const u32 ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A); - /* Only program if the buffer is not enabled yet. */ - if (!(ddi_buf_ctl & DDI_BUF_CTL_ENABLE)) - graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl | DDI_A_4_LANES); - } + if (CONFIG(SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION) && !acpi_is_wakeup_s3()) + configure_ddi_a_bifurcation(); /* * GFX PEIM module inside FSP binary is taking care of graphics @@ -332,6 +343,7 @@ const struct device_operations graphics_ops = { }; static const unsigned short pci_device_ids[] = { + PCI_DID_INTEL_PTL_GT2, PCI_DID_INTEL_LNL_M_GT2, PCI_DID_INTEL_RPL_U_GT1, PCI_DID_INTEL_RPL_U_GT2, @@ -348,6 +360,7 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_P_GT2_2, PCI_DID_INTEL_MTL_P_GT2_3, PCI_DID_INTEL_MTL_P_GT2_4, + PCI_DID_INTEL_MTL_P_GT2_5, PCI_DID_INTEL_APL_IGD_HD_505, PCI_DID_INTEL_APL_IGD_HD_500, PCI_DID_INTEL_CNL_GT2_ULX_1, |