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-rw-r--r--src/soc/intel/quark/fsp1_1.c35
1 files changed, 0 insertions, 35 deletions
diff --git a/src/soc/intel/quark/fsp1_1.c b/src/soc/intel/quark/fsp1_1.c
deleted file mode 100644
index 41dbb6c5944b..000000000000
--- a/src/soc/intel/quark/fsp1_1.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <fsp/util.h>
-#include <soc/ramstage.h>
-
-void fsp_silicon_init(bool s3wake)
-{
- if (IS_ENABLED(CONFIG_RELOCATE_FSP_INTO_DRAM))
- intel_silicon_init();
- else
- fsp_run_silicon_init(find_fsp(CONFIG_FSP_ESRAM_LOC), s3wake);
-}
-
-void soc_silicon_init_params(SILICON_INIT_UPD *upd)
-{
-}
-
-void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
- SILICON_INIT_UPD *new)
-{
-}