diff options
Diffstat (limited to 'src/soc/intel/tigerlake')
| -rw-r--r-- | src/soc/intel/tigerlake/bootblock/report_platform.c | 108 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/lpm.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/systemagent.c | 12 |
3 files changed, 62 insertions, 62 deletions
diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c index 109ab60d0275..af7a96ae4a2c 100644 --- a/src/soc/intel/tigerlake/bootblock/report_platform.c +++ b/src/soc/intel/tigerlake/bootblock/report_platform.c @@ -32,72 +32,72 @@ static struct { u16 mchid; const char *name; } mch_table[] = { - { PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2, "Tigerlake-U-2-2" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2, "Tigerlake-U-4-2" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2, "Tigerlake-Y-2-2" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2, "Tigerlake-Y-4-2" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1, "Tigerlake-H-6-1" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1, "Tigerlake-H-8-1" }, + { PCI_DID_INTEL_TGL_ID_U_2_2, "Tigerlake-U-2-2" }, + { PCI_DID_INTEL_TGL_ID_U_4_2, "Tigerlake-U-4-2" }, + { PCI_DID_INTEL_TGL_ID_Y_2_2, "Tigerlake-Y-2-2" }, + { PCI_DID_INTEL_TGL_ID_Y_4_2, "Tigerlake-Y-4-2" }, + { PCI_DID_INTEL_TGL_ID_H_6_1, "Tigerlake-H-6-1" }, + { PCI_DID_INTEL_TGL_ID_H_8_1, "Tigerlake-H-8-1" }, }; static struct { u16 espiid; const char *name; } pch_table[] = { - { PCI_DEVICE_ID_INTEL_TGP_ESPI_0, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_SUPER_U_ESPI, "Tigerlake-U Super SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_PREMIUM_U_ESPI, "Tigerlake-U Premium SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_BASE_U_ESPI, "Tigerlake-U Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_1, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_2, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_SUPER_Y_ESPI, "Tigerlake-Y Super SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_PREMIUM_Y_ESPI, "Tigerlake-Y Premium SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_3, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_4, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_5, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_6, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_7, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_8, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_9, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_10, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_11, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_12, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_13, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_14, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_15, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_16, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_17, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_18, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_19, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_20, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_21, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_22, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_23, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_24, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_25, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_26, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_B560, "Tigerlake-H B560" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H510, "Tigerlake-H H510" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H570, "Tigerlake-H H570" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Q570, "Tigerlake-H Q570" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_W580, "Tigerlake-H W580" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Z590, "Tigerlake-H Z590" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_HM570, "Tigerlake-H HM570" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_QM580, "Tigerlake-H QM580" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_WM590, "Tigerlake-H WM590" }, + { PCI_DID_INTEL_TGP_ESPI_0, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_SUPER_U_ESPI, "Tigerlake-U Super SKU" }, + { PCI_DID_INTEL_TGP_PREMIUM_U_ESPI, "Tigerlake-U Premium SKU" }, + { PCI_DID_INTEL_TGP_BASE_U_ESPI, "Tigerlake-U Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_1, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_2, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_SUPER_Y_ESPI, "Tigerlake-Y Super SKU" }, + { PCI_DID_INTEL_TGP_PREMIUM_Y_ESPI, "Tigerlake-Y Premium SKU" }, + { PCI_DID_INTEL_TGP_ESPI_3, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_4, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_5, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_6, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_7, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_8, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_9, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_10, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_11, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_12, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_13, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_14, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_15, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_16, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_17, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_18, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_19, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_20, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_21, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_22, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_23, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_24, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_25, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_26, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_H_ESPI_B560, "Tigerlake-H B560" }, + { PCI_DID_INTEL_TGP_H_ESPI_H510, "Tigerlake-H H510" }, + { PCI_DID_INTEL_TGP_H_ESPI_H570, "Tigerlake-H H570" }, + { PCI_DID_INTEL_TGP_H_ESPI_Q570, "Tigerlake-H Q570" }, + { PCI_DID_INTEL_TGP_H_ESPI_W580, "Tigerlake-H W580" }, + { PCI_DID_INTEL_TGP_H_ESPI_Z590, "Tigerlake-H Z590" }, + { PCI_DID_INTEL_TGP_H_ESPI_HM570, "Tigerlake-H HM570" }, + { PCI_DID_INTEL_TGP_H_ESPI_QM580, "Tigerlake-H QM580" }, + { PCI_DID_INTEL_TGP_H_ESPI_WM590, "Tigerlake-H WM590" }, }; static struct { u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_TGL_GT0, "Tigerlake U GT0" }, - { PCI_DEVICE_ID_INTEL_TGL_GT1_H_32, "Tigerlake H GT1 32EU" }, - { PCI_DEVICE_ID_INTEL_TGL_GT1_H_16, "Tigerlake H GT1 16EU" }, - { PCI_DEVICE_ID_INTEL_TGL_GT2_ULT, "Tigerlake U GT2" }, - { PCI_DEVICE_ID_INTEL_TGL_GT2_ULX, "Tigerlake Y GT2" }, - { PCI_DEVICE_ID_INTEL_TGL_GT3_ULT, "Tigerlake U GT3" }, - { PCI_DEVICE_ID_INTEL_TGL_GT2_ULT_1, "Tigerlake U GT2 1" }, + { PCI_DID_INTEL_TGL_GT0, "Tigerlake U GT0" }, + { PCI_DID_INTEL_TGL_GT1_H_32, "Tigerlake H GT1 32EU" }, + { PCI_DID_INTEL_TGL_GT1_H_16, "Tigerlake H GT1 16EU" }, + { PCI_DID_INTEL_TGL_GT2_ULT, "Tigerlake U GT2" }, + { PCI_DID_INTEL_TGL_GT2_ULX, "Tigerlake Y GT2" }, + { PCI_DID_INTEL_TGL_GT3_ULT, "Tigerlake U GT3" }, + { PCI_DID_INTEL_TGL_GT2_ULT_1, "Tigerlake U GT2 1" }, }; static inline uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/tigerlake/lpm.c b/src/soc/intel/tigerlake/lpm.c index 92279d682b97..0dd725abb9fa 100644 --- a/src/soc/intel/tigerlake/lpm.c +++ b/src/soc/intel/tigerlake/lpm.c @@ -20,8 +20,8 @@ static bool platform_is_up3(void) if ((cpu_id != CPUID_TIGERLAKE_A0) && (cpu_id != CPUID_TIGERLAKE_B0)) return false; - return ((mchid == PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2) || - (mchid == PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2)); + return ((mchid == PCI_DID_INTEL_TGL_ID_U_2_2) || + (mchid == PCI_DID_INTEL_TGL_ID_U_4_2)); } int get_supported_lpm_mask(struct soc_intel_tigerlake_config *config) diff --git a/src/soc/intel/tigerlake/systemagent.c b/src/soc/intel/tigerlake/systemagent.c index 0e9488c1b224..06282eaaba64 100644 --- a/src/soc/intel/tigerlake/systemagent.c +++ b/src/soc/intel/tigerlake/systemagent.c @@ -78,22 +78,22 @@ void soc_systemagent_init(struct device *dev) * differentiated here based on SA PCI ID. */ switch (sa_pci_id) { - case PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2: + case PCI_DID_INTEL_TGL_ID_U_2_2: soc_config = &config->power_limits_config[POWER_LIMITS_U_2_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2: + case PCI_DID_INTEL_TGL_ID_U_4_2: soc_config = &config->power_limits_config[POWER_LIMITS_U_4_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2: + case PCI_DID_INTEL_TGL_ID_Y_2_2: soc_config = &config->power_limits_config[POWER_LIMITS_Y_2_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2: + case PCI_DID_INTEL_TGL_ID_Y_4_2: soc_config = &config->power_limits_config[POWER_LIMITS_Y_4_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1: + case PCI_DID_INTEL_TGL_ID_H_6_1: soc_config = &config->power_limits_config[POWER_LIMITS_H_6_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1: + case PCI_DID_INTEL_TGL_ID_H_8_1: soc_config = &config->power_limits_config[POWER_LIMITS_H_8_CORE]; break; default: |