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-rw-r--r--src/soc/mediatek/common/include/soc/dramc_soc_common.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/include/soc/dramc_soc_common.h b/src/soc/mediatek/common/include/soc/dramc_soc_common.h
new file mode 100644
index 000000000000..8898709f4b35
--- /dev/null
+++ b/src/soc/mediatek/common/include/soc/dramc_soc_common.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_DRAMC_SOC_COMMON_H__
+#define __SOC_MEDIATEK_DRAMC_SOC_COMMON_H__
+
+/*
+ * Internal CBT mode enum
+ * 1. Calibration flow uses vGet_Dram_CBT_Mode to
+ * differentiate between mixed vs non-mixed LP4
+ * 2. Declared as dram_cbt_mode[RANK_MAX] internally to
+ * store each rank's CBT mode type
+ */
+typedef enum {
+ CBT_NORMAL_MODE = 0,
+ CBT_BYTE_MODE1,
+} DRAM_CBT_MODE_T;
+
+#define DQS_NUMBER_LP4 2
+#define DQS_BIT_NUMBER 8
+#define DQ_DATA_WIDTH_LP4 16
+
+#endif /* __SOC_MEDIATEK_DRAMC_SOC_COMMON_H__ */