2 files changed, 25 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8188/include/soc/addressmap.h b/src/soc/mediatek/mt8188/include/soc/addressmap.h
index 53e52146ea76..b942a85d5d7e 100644
--- a/src/soc/mediatek/mt8188/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8188/include/soc/addressmap.h
@@ -55,6 +55,7 @@ enum {
 	I2C6_DMA_BASE		= IO_PHYS + 0x00220600,
 	DEVAPC_INFRA2_AO_BASE	= IO_PHYS + 0x00228000,
 	DRAMC_CHA_AO_BASE	= IO_PHYS + 0x00230000,
+	SUB_INFRACFG_AO_BASE	= IO_PHYS + 0x0030E000,
 	INFRA_TRACKER_BASE	= IO_PHYS + 0x00314000,
 	SSPM_SRAM_BASE          = IO_PHYS + 0x00400000,
 	SSPM_CFG_BASE		= IO_PHYS + 0x00440000,
diff --git a/src/soc/mediatek/mt8188/include/soc/devapc.h b/src/soc/mediatek/mt8188/include/soc/devapc.h
index d71377c2b80c..8765aded05a9 100644
--- a/src/soc/mediatek/mt8188/include/soc/devapc.h
+++ b/src/soc/mediatek/mt8188/include/soc/devapc.h
@@ -15,6 +15,7 @@ enum devapc_ao_offset {
 	DOM_REMAP_0_1 = 0x00804,
 	DOM_REMAP_2_0 = 0x00820,
 	MAS_DOM_0 = 0x00900,
+	MAS_DOM_1 = 0x00904,
 	MAS_SEC_0 = 0x00A00,
 	AO_APC_CON = 0x00F00,
 };
@@ -26,6 +27,11 @@ enum scp_offset {
 	ONETIME_LOCK = 0xA5104,
 };
 
+enum sub_infracfg_ao_mem_offset {
+	INFRA_AO_SEC_MFG_HYP = 0xFB4,
+	INFRA_AO_SEC_MFG_HYP2 = 0x68,
+};
+
 /******************************************************************************
  * STRUCTURE DEFINITION
  ******************************************************************************/
@@ -43,6 +49,11 @@ enum devapc_cfg_index {
 	DEVAPC_DEBUGSYS_INDEX = 14,
 };
 
+enum mfg_dom {
+	MFG_S_D6 = 0x16,
+	MFG_NS_D6 = 0x6,
+};
+
 /* PERM_ATTR MACRO */
 #define DAPC_INFRA_AO_SYS0_ATTR(...)	{ { DAPC_PERM_ATTR_16(__VA_ARGS__) } }
 #define DAPC_INFRA_AO_SYS1_ATTR(...)	{ { DAPC_PERM_ATTR_4(__VA_ARGS__) } }
@@ -58,6 +69,7 @@ enum devapc_cfg_index {
 #define MOD_NO_IN_1_DEVAPC		16
 #define DOMAIN_OFT			0x40
 #define IDX_OFT				0x4
+#define MFG_HPY_OFT			0
 
 /******************************************************************************
  * Bit Field DEFINITION
@@ -75,4 +87,16 @@ DEFINE_BITFIELD(SPM_DOM, 3, 0)		/* 0 */
 /* PERI_PAR */
 DEFINE_BITFIELD(PCIE0_DOM, 27, 24)	/* 19 */
 
+/* FMEM */
+DEFINE_BITFIELD(MFG_M0_DOM, 19, 16)	/* 6 */
+
+/* INFRACFG_AO SEC MFG HYP */
+DEFINE_BITFIELD(OSID0, 4, 0)
+DEFINE_BITFIELD(OSID1, 9, 5)
+DEFINE_BITFIELD(OSID2, 14, 10)
+DEFINE_BITFIELD(OSID3, 19, 15)
+DEFINE_BITFIELD(FM_EN, 24, 20)
+DEFINE_BITFIELD(SEC_EN, 29, 25)
+DEFINE_BIT(REMAP_EN, 31)
+
 #endif /* SOC_MEDIATEK_MT8188_DEVAPC_H */