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-rw-r--r--src/soc/mediatek/common/display.c2
-rw-r--r--src/soc/mediatek/common/include/soc/usb_common.h5
-rw-r--r--src/soc/mediatek/common/tps65132s.c2
-rw-r--r--src/soc/mediatek/common/usb.c14
-rw-r--r--src/soc/mediatek/common/usb_secondary.c12
-rw-r--r--src/soc/mediatek/mt8173/i2c.c2
-rw-r--r--src/soc/mediatek/mt8186/Makefile.mk2
-rw-r--r--src/soc/mediatek/mt8186/include/soc/addressmap.h6
-rw-r--r--src/soc/mediatek/mt8186/pll.c1
-rw-r--r--src/soc/mediatek/mt8188/devapc.c32
-rw-r--r--src/soc/mediatek/mt8188/include/soc/addressmap.h1
-rw-r--r--src/soc/mediatek/mt8188/include/soc/devapc.h24
-rw-r--r--src/soc/mediatek/mt8188/pll.c1
-rw-r--r--src/soc/mediatek/mt8188/soc.c2
-rw-r--r--src/soc/mediatek/mt8195/pll.c1
15 files changed, 92 insertions, 15 deletions
diff --git a/src/soc/mediatek/common/display.c b/src/soc/mediatek/common/display.c
index 0dea58c74f97..a212805b5b18 100644
--- a/src/soc/mediatek/common/display.c
+++ b/src/soc/mediatek/common/display.c
@@ -10,7 +10,7 @@
#include <soc/dptx.h>
#include <soc/dsi.h>
#include <soc/mtcmos.h>
-#include <string.h>
+#include <stdio.h>
static struct panel_serializable_data *get_mipi_cmd_from_cbfs(struct panel_description *desc)
{
diff --git a/src/soc/mediatek/common/include/soc/usb_common.h b/src/soc/mediatek/common/include/soc/usb_common.h
index d390b70ffa67..249959b91042 100644
--- a/src/soc/mediatek/common/include/soc/usb_common.h
+++ b/src/soc/mediatek/common/include/soc/usb_common.h
@@ -4,6 +4,7 @@
#define SOC_MEDIATEK_USB_COMMON_H
#include <stddef.h>
+#include <stdint.h>
/* ip_pw_ctrl0 */
#define CTRL0_IP_SW_RST (0x1 << 0)
@@ -162,5 +163,7 @@ void mtk_usb_prepare(void);
void mtk_usb_adjust_phy_shift(void);
void setup_usb_host(void);
-
+void update_usb_base_regs(uintptr_t ippc_base, uintptr_t sif_base);
+void setup_usb_secondary_host(void);
+void setup_usb_host_controller(void);
#endif
diff --git a/src/soc/mediatek/common/tps65132s.c b/src/soc/mediatek/common/tps65132s.c
index 5a290351232e..f93809a96bc3 100644
--- a/src/soc/mediatek/common/tps65132s.c
+++ b/src/soc/mediatek/common/tps65132s.c
@@ -3,7 +3,7 @@
#include <console/console.h>
#include <delay.h>
#include <device/i2c_simple.h>
-#include <soc/gpio.h>
+#include <gpio.h>
#include <soc/i2c.h>
#include <soc/tps65132s.h>
diff --git a/src/soc/mediatek/common/usb.c b/src/soc/mediatek/common/usb.c
index b9fe83529d3b..cc2503b4e5fe 100644
--- a/src/soc/mediatek/common/usb.c
+++ b/src/soc/mediatek/common/usb.c
@@ -13,6 +13,12 @@
static struct ssusb_ippc_regs *ippc_regs = (void *)(SSUSB_IPPC_BASE);
static struct ssusb_sif_port *phy_ports = (void *)(SSUSB_SIF_BASE);
+void update_usb_base_regs(uintptr_t ippc_base, uintptr_t sif_base)
+{
+ ippc_regs = (void *)ippc_base;
+ phy_ports = (void *)sif_base;
+}
+
static void phy_index_power_on(int index)
{
struct ssusb_sif_port *phy = phy_ports + index;
@@ -150,7 +156,7 @@ __weak void mtk_usb_adjust_phy_shift(void)
/* do nothing */
}
-void setup_usb_host(void)
+void setup_usb_host_controller(void)
{
u3p_msg("Setting up USB HOST controller...\n");
@@ -164,3 +170,9 @@ void setup_usb_host(void)
mtk_usb_adjust_phy_shift();
u3p_msg("phy power-on done.\n");
}
+
+void setup_usb_host(void)
+{
+ update_usb_base_regs(SSUSB_IPPC_BASE, SSUSB_SIF_BASE);
+ setup_usb_host_controller();
+}
diff --git a/src/soc/mediatek/common/usb_secondary.c b/src/soc/mediatek/common/usb_secondary.c
new file mode 100644
index 000000000000..ee85630250f0
--- /dev/null
+++ b/src/soc/mediatek/common/usb_secondary.c
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/addressmap.h>
+#include <soc/usb.h>
+
+void setup_usb_secondary_host(void)
+{
+ /* We always consider USB2 port as the secondary UBS host regardless of the
+ register naming */
+ update_usb_base_regs(SSUSB_IPPC_BASE_P0, SSUSB_SIF_BASE_P0);
+ setup_usb_host_controller();
+}
diff --git a/src/soc/mediatek/mt8173/i2c.c b/src/soc/mediatek/mt8173/i2c.c
index dd4629d9098b..9cd20cf465aa 100644
--- a/src/soc/mediatek/mt8173/i2c.c
+++ b/src/soc/mediatek/mt8173/i2c.c
@@ -60,8 +60,6 @@ _Static_assert(ARRAY_SIZE(mtk_i2c_bus_controller) == I2C_BUS_NUMBER,
#define I2CLOG(fmt, arg...)
#endif /* CONFIG_DEBUG_I2C */
-#define I2CERR(fmt, arg...) printk(BIOS_ERR, I2CTAG fmt, ##arg)
-
void mtk_i2c_bus_init(uint8_t bus)
{
uint8_t step_div;
diff --git a/src/soc/mediatek/mt8186/Makefile.mk b/src/soc/mediatek/mt8186/Makefile.mk
index 3a3cc07ce6f7..8e116f82e653 100644
--- a/src/soc/mediatek/mt8186/Makefile.mk
+++ b/src/soc/mediatek/mt8186/Makefile.mk
@@ -51,7 +51,7 @@ ramstage-y += soc.c
ramstage-y += ../common/spm.c spm.c
ramstage-y += ../common/sspm.c
ramstage-y += ../common/tps65132s.c
-ramstage-y += ../common/usb.c usb.c
+ramstage-y += ../common/usb.c ../common/usb_secondary.c usb.c
CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include
diff --git a/src/soc/mediatek/mt8186/include/soc/addressmap.h b/src/soc/mediatek/mt8186/include/soc/addressmap.h
index 5f0b10c5e03e..64500aaad094 100644
--- a/src/soc/mediatek/mt8186/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8186/include/soc/addressmap.h
@@ -76,11 +76,13 @@ enum {
SPI5_BASE = IO_PHYS + 0x01015000,
I2C5_BASE = IO_PHYS + 0x01016000,
I2C9_BASE = IO_PHYS + 0x01019000,
- /* Corsola uses USB2 port1 instead of USB2 port0. */
+ /* IPPC_BASE is for USB2 port1, IPPC_BASE_P0 is for USB2 port0 */
+ SSUSB_IPPC_BASE_P0 = IO_PHYS + 0x01203E00,
SSUSB_IPPC_BASE = IO_PHYS + 0x01283E00,
MSDC0_BASE = IO_PHYS + 0x01230000,
- /* Corsola uses USB2 port1 instead of USB2 port0. */
+ /* SIF_BASE is for USB2 port1, SIF_BASE_P0 is for USB2 port0 */
SSUSB_SIF_BASE = IO_PHYS + 0x01C80300,
+ SSUSB_SIF_BASE_P0 = IO_PHYS + 0x01CA0300,
EFUSEC_BASE = IO_PHYS + 0x01CB0000,
MIPITX_BASE = IO_PHYS + 0x01CC0000,
MSDC0_TOP_BASE = IO_PHYS + 0x01CD0000,
diff --git a/src/soc/mediatek/mt8186/pll.c b/src/soc/mediatek/mt8186/pll.c
index a6165ef2a5e6..6b9eae67d87e 100644
--- a/src/soc/mediatek/mt8186/pll.c
+++ b/src/soc/mediatek/mt8186/pll.c
@@ -8,7 +8,6 @@
#include <console/console.h>
#include <device/mmio.h>
#include <delay.h>
-#include <stddef.h>
#include <timer.h>
#include <soc/addressmap.h>
diff --git a/src/soc/mediatek/mt8188/devapc.c b/src/soc/mediatek/mt8188/devapc.c
index 6c585baf50b0..960c70ae0766 100644
--- a/src/soc/mediatek/mt8188/devapc.c
+++ b/src/soc/mediatek/mt8188/devapc.c
@@ -114,14 +114,14 @@ static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = {
DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-1",
NO_PROTECTION, FORBIDDEN15),
DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-2",
- NO_PROTECTION, FORBIDDEN15),
+ SEC_RW_ONLY, FORBIDDEN15),
DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-3",
NO_PROTECTION, FORBIDDEN15),
/* 50 */
DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-4",
NO_PROTECTION, FORBIDDEN15),
DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-5",
- NO_PROTECTION, FORBIDDEN15),
+ SEC_RW_ONLY, FORBIDDEN15),
DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-6",
NO_PROTECTION, FORBIDDEN15),
DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-7",
@@ -1616,6 +1616,8 @@ static void dump_fmem_ao(uintptr_t base)
{
printk(BIOS_DEBUG, "[DEVAPC] (DEVAPC_FMEM_AO_BASE %#lx)DOM_REMAP_0_0:%#x\n",
base, read32(getreg(base, DOM_REMAP_0_0)));
+ printk(BIOS_DEBUG, "[DEVAPC] (DEVAPC_FMEM_AO_BASE %#lx)MAS_DOM_1:%#x\n",
+ base, read32(getreg(base, MAS_DOM_1)));
}
static void dump_infra2_ao(uintptr_t base)
@@ -1633,6 +1635,12 @@ static void dump_scp_master(uintptr_t base)
read32(getreg(base, ONETIME_LOCK)));
}
+static void dump_sec_mfg_hyp(uintptr_t base)
+{
+ printk(BIOS_DEBUG, "[DEVAPC] (DEVAPC_INFRA_BASE %#lx)INFRA_AO_SEC_MFG_HYP:%#x\n",
+ base, read32(getreg(base, 0)));
+}
+
static void infra_init(uintptr_t base)
{
void *reg;
@@ -1715,6 +1723,10 @@ static void peri_par_init(uintptr_t base)
static void fmem_master_init(uintptr_t base)
{
+ /* Master Domain */
+ SET32_BITFIELDS(getreg(base, MAS_DOM_1),
+ MFG_M0_DOM, DOMAIN_6);
+
/*
* Domain Remap: TINYSYS to EMI (3-bit to 4-bit)
* 1. DSP from 0 to 4
@@ -1770,6 +1782,18 @@ static void scp_master_init(uintptr_t base)
write32(getreg(base, ONETIME_LOCK), 0x5);
}
+static void infra_sec_mfg_hyp_init(uintptr_t base)
+{
+ /* Set GPU protection mode */
+ SET32_BITFIELDS(getreg(base, MFG_HPY_OFT), OSID0, MFG_NS_D6);
+ SET32_BITFIELDS(getreg(base, MFG_HPY_OFT), OSID1, MFG_NS_D6);
+ SET32_BITFIELDS(getreg(base, MFG_HPY_OFT), OSID2, MFG_NS_D6);
+ SET32_BITFIELDS(getreg(base, MFG_HPY_OFT), OSID3, MFG_NS_D6);
+ SET32_BITFIELDS(getreg(base, MFG_HPY_OFT), FM_EN, MFG_NS_D6);
+ SET32_BITFIELDS(getreg(base, MFG_HPY_OFT), SEC_EN, MFG_S_D6);
+ SET32_BITFIELDS(getreg(base, MFG_HPY_OFT), REMAP_EN, 1);
+}
+
const struct devapc_init_ops devapc_init[] = {
{ DEVAPC_INFRA_AO_BASE, infra_init, dump_infra_ao_apc },
{ DEVAPC_PERI_AO_BASE, peri_init, dump_peri_ao_apc },
@@ -1778,6 +1802,10 @@ const struct devapc_init_ops devapc_init[] = {
{ DEVAPC_FMEM_AO_BASE, fmem_master_init, dump_fmem_ao },
{ DEVAPC_INFRA2_AO_BASE, infra2_master_init, dump_infra2_ao },
{ SCP_CFG_BASE, scp_master_init, dump_scp_master },
+ { INFRACFG_AO_BASE + INFRA_AO_SEC_MFG_HYP,
+ infra_sec_mfg_hyp_init, dump_sec_mfg_hyp },
+ { SUB_INFRACFG_AO_BASE + INFRA_AO_SEC_MFG_HYP2,
+ infra_sec_mfg_hyp_init, dump_sec_mfg_hyp },
};
const size_t devapc_init_cnt = ARRAY_SIZE(devapc_init);
diff --git a/src/soc/mediatek/mt8188/include/soc/addressmap.h b/src/soc/mediatek/mt8188/include/soc/addressmap.h
index 53e52146ea76..b942a85d5d7e 100644
--- a/src/soc/mediatek/mt8188/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8188/include/soc/addressmap.h
@@ -55,6 +55,7 @@ enum {
I2C6_DMA_BASE = IO_PHYS + 0x00220600,
DEVAPC_INFRA2_AO_BASE = IO_PHYS + 0x00228000,
DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000,
+ SUB_INFRACFG_AO_BASE = IO_PHYS + 0x0030E000,
INFRA_TRACKER_BASE = IO_PHYS + 0x00314000,
SSPM_SRAM_BASE = IO_PHYS + 0x00400000,
SSPM_CFG_BASE = IO_PHYS + 0x00440000,
diff --git a/src/soc/mediatek/mt8188/include/soc/devapc.h b/src/soc/mediatek/mt8188/include/soc/devapc.h
index d71377c2b80c..8765aded05a9 100644
--- a/src/soc/mediatek/mt8188/include/soc/devapc.h
+++ b/src/soc/mediatek/mt8188/include/soc/devapc.h
@@ -15,6 +15,7 @@ enum devapc_ao_offset {
DOM_REMAP_0_1 = 0x00804,
DOM_REMAP_2_0 = 0x00820,
MAS_DOM_0 = 0x00900,
+ MAS_DOM_1 = 0x00904,
MAS_SEC_0 = 0x00A00,
AO_APC_CON = 0x00F00,
};
@@ -26,6 +27,11 @@ enum scp_offset {
ONETIME_LOCK = 0xA5104,
};
+enum sub_infracfg_ao_mem_offset {
+ INFRA_AO_SEC_MFG_HYP = 0xFB4,
+ INFRA_AO_SEC_MFG_HYP2 = 0x68,
+};
+
/******************************************************************************
* STRUCTURE DEFINITION
******************************************************************************/
@@ -43,6 +49,11 @@ enum devapc_cfg_index {
DEVAPC_DEBUGSYS_INDEX = 14,
};
+enum mfg_dom {
+ MFG_S_D6 = 0x16,
+ MFG_NS_D6 = 0x6,
+};
+
/* PERM_ATTR MACRO */
#define DAPC_INFRA_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } }
#define DAPC_INFRA_AO_SYS1_ATTR(...) { { DAPC_PERM_ATTR_4(__VA_ARGS__) } }
@@ -58,6 +69,7 @@ enum devapc_cfg_index {
#define MOD_NO_IN_1_DEVAPC 16
#define DOMAIN_OFT 0x40
#define IDX_OFT 0x4
+#define MFG_HPY_OFT 0
/******************************************************************************
* Bit Field DEFINITION
@@ -75,4 +87,16 @@ DEFINE_BITFIELD(SPM_DOM, 3, 0) /* 0 */
/* PERI_PAR */
DEFINE_BITFIELD(PCIE0_DOM, 27, 24) /* 19 */
+/* FMEM */
+DEFINE_BITFIELD(MFG_M0_DOM, 19, 16) /* 6 */
+
+/* INFRACFG_AO SEC MFG HYP */
+DEFINE_BITFIELD(OSID0, 4, 0)
+DEFINE_BITFIELD(OSID1, 9, 5)
+DEFINE_BITFIELD(OSID2, 14, 10)
+DEFINE_BITFIELD(OSID3, 19, 15)
+DEFINE_BITFIELD(FM_EN, 24, 20)
+DEFINE_BITFIELD(SEC_EN, 29, 25)
+DEFINE_BIT(REMAP_EN, 31)
+
#endif /* SOC_MEDIATEK_MT8188_DEVAPC_H */
diff --git a/src/soc/mediatek/mt8188/pll.c b/src/soc/mediatek/mt8188/pll.c
index d892e1cf7289..3dfaac97fc92 100644
--- a/src/soc/mediatek/mt8188/pll.c
+++ b/src/soc/mediatek/mt8188/pll.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <device/mmio.h>
#include <delay.h>
-#include <stddef.h>
#include <timer.h>
#include <soc/addressmap.h>
diff --git a/src/soc/mediatek/mt8188/soc.c b/src/soc/mediatek/mt8188/soc.c
index 35071d50f1db..e7124ba14edc 100644
--- a/src/soc/mediatek/mt8188/soc.c
+++ b/src/soc/mediatek/mt8188/soc.c
@@ -15,7 +15,7 @@
#include <symbols.h>
#define OPTEE_ADDRESS 0x43000000
-#define OPTEE_SIZE (80 * MiB)
+#define OPTEE_SIZE (70 * MiB)
void bootmem_platform_add_ranges(void)
{
diff --git a/src/soc/mediatek/mt8195/pll.c b/src/soc/mediatek/mt8195/pll.c
index 69b9c1e055f5..397ff21d4e01 100644
--- a/src/soc/mediatek/mt8195/pll.c
+++ b/src/soc/mediatek/mt8195/pll.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <device/mmio.h>
#include <delay.h>
-#include <stddef.h>
#include <timer.h>
#include <soc/addressmap.h>