diff options
Diffstat (limited to 'src/southbridge/intel')
30 files changed, 40 insertions, 40 deletions
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c index dc5da793a3c4..241c1a0d8393 100644 --- a/src/southbridge/intel/bd82x6x/elog.c +++ b/src/southbridge/intel/bd82x6x/elog.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <arch/io.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 35d71a4d0761..1100544707a4 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -12,8 +12,8 @@ #include <pc80/i8259.h> #include <arch/io.h> #include <arch/ioapic.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <cpu/x86/smm.h> #include <cbmem.h> #include <string.h> diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index b1f3bfe86169..ae62638f1b86 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -9,7 +9,7 @@ * not used unless the console loglevel is high enough. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 054c29f5650a..d240bf65d538 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -9,7 +9,7 @@ * not used unless the console loglevel is high enough. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/mmio.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 0a236c6b7ef8..a452263645e4 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -4,7 +4,7 @@ #ifndef SOUTHBRIDGE_INTEL_BD82X6X_PCH_H #define SOUTHBRIDGE_INTEL_BD82X6X_PCH_H -#include <arch/acpi.h> +#include <acpi/acpi.h> /* PCH types */ #define PCH_TYPE_CPT 0x1c /* CougarPoint */ diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c index 20dafdfd3839..d1a00f4498c6 100644 --- a/src/southbridge/intel/common/acpi_pirq_gen.c +++ b/src/southbridge/intel/common/acpi_pirq_gen.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <console/console.h> #include <device/pci_def.h> #include <device/pci_ops.h> diff --git a/src/southbridge/intel/common/madt.c b/src/southbridge/intel/common/madt.c index d425a74366b3..fe65afaea209 100644 --- a/src/southbridge/intel/common/madt.c +++ b/src/southbridge/intel/common/madt.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <arch/ioapic.h> #include <arch/smp/mpspec.h> diff --git a/src/southbridge/intel/common/pciehp.c b/src/southbridge/intel/common/pciehp.c index e5bbdab2fb22..4f77bb008671 100644 --- a/src/southbridge/intel/common/pciehp.c +++ b/src/southbridge/intel/common/pciehp.c @@ -2,8 +2,8 @@ /* This file is part of the coreboot project. */ #include <string.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c index 6175302d54b5..d78e9cd2e8e2 100644 --- a/src/southbridge/intel/common/pmbase.c +++ b/src/southbridge/intel/common/pmbase.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <stdint.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <arch/io.h> #include <bootmode.h> #include <device/pci_ops.h> diff --git a/src/southbridge/intel/common/pmclib.c b/src/southbridge/intel/common/pmclib.c index d44d6195ceaf..72df0ff86a11 100644 --- a/src/southbridge/intel/common/pmclib.c +++ b/src/southbridge/intel/common/pmclib.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <stdint.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <console/console.h> #include "pmclib.h" diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index 7b27ce0cd57c..3e3dca94f823 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -4,7 +4,7 @@ #include <types.h> #include <arch/io.h> #include <device/pci_ops.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c index 96fcefcebbf2..4b29e0fe4d86 100644 --- a/src/southbridge/intel/i82371eb/acpi_tables.c +++ b/src/southbridge/intel/i82371eb/acpi_tables.c @@ -2,8 +2,8 @@ /* This file is part of the coreboot project. */ #include <console/console.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <arch/smp/mpspec.h> #include <device/device.h> #include "i82371eb.h" diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index db1071a041e2..03bbdccb768c 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -16,7 +16,7 @@ */ #include <string.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/device.h> #include <device/pci.h> #include <version.h> diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index bc492df15a7c..d1918657c829 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -23,8 +23,8 @@ #include <pc80/mc146818rtc.h> #include <arch/ioapic.h> #if CONFIG(HAVE_ACPI_TABLES) -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #endif #include "i82371eb.h" #include "chip.h" diff --git a/src/southbridge/intel/i82371eb/wakeup.c b/src/southbridge/intel/i82371eb/wakeup.c index 253433368e60..45f0182edfdb 100644 --- a/src/southbridge/intel/i82371eb/wakeup.c +++ b/src/southbridge/intel/i82371eb/wakeup.c @@ -14,7 +14,7 @@ */ #include <stdint.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <arch/io.h> #include <console/console.h> #include "i82371eb.h" diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h index 35a0bc249eee..0b54fe7ec98a 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.h +++ b/src/southbridge/intel/i82801dx/i82801dx.h @@ -12,7 +12,7 @@ #ifndef I82801DX_H #define I82801DX_H -#include <arch/acpi.h> +#include <acpi/acpi.h> #if !defined(__ASSEMBLER__) diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c index c81dabe1bc7b..c437cc8620b5 100644 --- a/src/southbridge/intel/i82801dx/smi.c +++ b/src/southbridge/intel/i82801dx/smi.c @@ -5,7 +5,7 @@ #include <device/device.h> #include <device/pci.h> #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <arch/io.h> #include <device/pci_ops.h> #include <cpu/x86/cache.h> diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index e54f2bd80f5f..3e9493fdbcf2 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -12,9 +12,9 @@ #include <arch/io.h> #include <device/pci_ops.h> #include <arch/ioapic.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/x86/smm.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <arch/smp/mpspec.h> #include <cbmem.h> #include <string.h> diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 8765cc1584c7..072f60b106b7 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -12,9 +12,9 @@ #include <arch/io.h> #include <device/pci_ops.h> #include <arch/ioapic.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/x86/smm.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <cbmem.h> #include <string.h> #include "chip.h" diff --git a/src/southbridge/intel/i82801ix/smi.c b/src/southbridge/intel/i82801ix/smi.c index 30be71fedcf0..6cf0c5261196 100644 --- a/src/southbridge/intel/i82801ix/smi.c +++ b/src/southbridge/intel/i82801ix/smi.c @@ -9,7 +9,7 @@ #include <console/console.h> #include <arch/io.h> #include <device/pci_ops.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <cpu/x86/smi_deprecated.h> diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 77a8f7772b2f..e2658b32f99a 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -12,9 +12,9 @@ #include <arch/io.h> #include <device/pci_ops.h> #include <arch/ioapic.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/x86/smm.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <arch/smp/mpspec.h> #include <cbmem.h> #include <string.h> diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 4edf87e7c511..0b0a9f2d3929 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -13,9 +13,9 @@ #include <device/mmio.h> #include <device/pci_ops.h> #include <arch/ioapic.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <elog.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <cbmem.h> #include <string.h> #include <cpu/x86/smm.h> diff --git a/src/southbridge/intel/ibexpeak/madt.c b/src/southbridge/intel/ibexpeak/madt.c index c582048853b4..1b2e0162f634 100644 --- a/src/southbridge/intel/ibexpeak/madt.c +++ b/src/southbridge/intel/ibexpeak/madt.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <arch/ioapic.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index ea641ee5fc4c..bcdb17a9bbc3 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -9,7 +9,7 @@ * not used unless the console loglevel is high enough. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <console/console.h> #include <device/device.h> #include <device/mmio.h> diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h index fc20660e652b..7e8306cce3e3 100644 --- a/src/southbridge/intel/ibexpeak/pch.h +++ b/src/southbridge/intel/ibexpeak/pch.h @@ -4,7 +4,7 @@ #ifndef SOUTHBRIDGE_INTEL_BD82X6X_PCH_H #define SOUTHBRIDGE_INTEL_BD82X6X_PCH_H -#include <arch/acpi.h> +#include <acpi/acpi.h> /* PCH types */ #define PCH_TYPE_CPT 0x1c /* CougarPoint */ diff --git a/src/southbridge/intel/lynxpoint/acpi.c b/src/southbridge/intel/lynxpoint/acpi.c index 48e2a29bc8dc..315fb65f1723 100644 --- a/src/southbridge/intel/lynxpoint/acpi.c +++ b/src/southbridge/intel/lynxpoint/acpi.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <cbmem.h> #include <types.h> #include <string.h> diff --git a/src/southbridge/intel/lynxpoint/elog.c b/src/southbridge/intel/lynxpoint/elog.c index d19250cf6b75..85d89501eb73 100644 --- a/src/southbridge/intel/lynxpoint/elog.c +++ b/src/southbridge/intel/lynxpoint/elog.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <arch/io.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index b5fb674a26b6..6db647c6bfa6 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -11,14 +11,14 @@ #include <pc80/i8259.h> #include <arch/io.h> #include <arch/ioapic.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/x86/smm.h> #include <cbmem.h> #include <string.h> #include "chip.h" #include "nvs.h" #include "pch.h" -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/rtc.h> #include <southbridge/intel/common/spi.h> diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c index 4599c26cffa8..2c2c6ea3c9f6 100644 --- a/src/southbridge/intel/lynxpoint/me_9.x.c +++ b/src/southbridge/intel/lynxpoint/me_9.x.c @@ -9,7 +9,7 @@ * not used unless the console loglevel is high enough. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index d583992ab98d..870734924253 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -4,7 +4,7 @@ #ifndef SOUTHBRIDGE_INTEL_LYNXPOINT_PCH_H #define SOUTHBRIDGE_INTEL_LYNXPOINT_PCH_H -#include <arch/acpi.h> +#include <acpi/acpi.h> #define CROS_GPIO_DEVICE_NAME "LynxPoint" |