summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/anahera/overridetree.cb56
-rw-r--r--src/mainboard/google/brya/variants/anahera4es/overridetree.cb56
2 files changed, 16 insertions, 96 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb
index da5b78baa556..6a79a961a686 100644
--- a/src/mainboard/google/brya/variants/anahera/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb
@@ -302,24 +302,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@@ -332,36 +322,21 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 2)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 2))"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -378,12 +353,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-A Port (DB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -397,24 +367,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-A Port (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 2)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 2))"
device ref usb3_port3 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
index 6745779e8ff6..ab432e962e81 100644
--- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
@@ -294,24 +294,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@@ -324,36 +314,21 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 2)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 2))"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -370,12 +345,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-A Port (DB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -389,24 +359,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-A Port (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 2)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 2))"
device ref usb3_port3 on end
end
chip drivers/usb/acpi
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-08 05:01:45 +0000