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* Update vboot submodule to upstream mainBora Guvendik2021-04-221-0/+0
| | | | | | | | | | | | | | | Updating from commit id 9d4053df: 2020-11-20 01:51:08 +0000 - (Revert "Reland: Clean up implicit fall through.") to commit id 57c0c5be: 2021-04-09 11:45:39 +0800 - (cgpt: Move all GPT on SPI-NOR infra behind a flag) Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Change-Id: Id50a892f12ff3c4147c422c98b640ac047143128 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52453 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/qc_blobs: Uprev to new HEAD (02ba9a6)Shelley Chen2021-04-211-0/+0
| | | | | | | | Change-Id: I18fc6443a6972e22c979daaf68d0b9c046d1866f Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52558 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* 3rdparty/blobs: Update blobs pointer to f388b6794e6fRaul E Rangel2021-04-071-0/+0
| | | | | | | | | | | | | | | | mb/google/guybrush: Update APCB - disable debug mb/google/guybrush: Add APCB to get through memory training soc/mediatek/mt8192: Add EMI Settings of 8GB Normal Mode soc/mediatek/mt8192: Update MCUPM firmware soc/mediatek/mt8192: Add version info for SSPM TEST=Boot guybrush to OS Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I445d753c712670fe80efcdf29459736df2b76666 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* Update amd_blobs submodule to upstream masterMartin Roth2021-03-281-0/+0
| | | | | | | | | | | | | | | | Updating from commit id 3a9d7cd: 2021-03-03 15:37:08 -0700 - (picasso: Update Dali SMU firmware) to commit id dded82f: 2021-03-23 15:36:36 -0600 - (picasso: Update Dali SMU firmware) This brings in 2 new commits. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: If71e52a2a3e50aeb8599798de7b49bc71ed26a04 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* 3rdparty/intel-sec-tools: Update submodule pointerArthur Heymans2021-03-191-0/+0
| | | | | | | | | | This includes the bg-prov tool. Change-Id: Iba8efe3bcb67694da76ef78abaa0562d47f7850b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com>
* Update chromeec submodule to upstream masterMartin Roth2021-03-161-0/+0
| | | | | | | | | | | | | | | | | Updating from commit id a2390f3c5: 2020-12-01 08:35:44 +0000 - (servo_v4/usb_pd_policy: Reject SNK->SRC power swap if CC_ALLOW_SRC not set) to commit id 1e800ac83: 2021-03-01 22:59:54 +0000 - (docs: point md files in master to main/HEAD) This brings in 188 new commits. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I5c276d7839e0bdbf14ac56f16c231d75a6ea4c3e Reviewed-on: https://review.coreboot.org/c/coreboot/+/51464 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* Update arm-trusted-firmware submodule to upstream masterMartin Roth2021-03-161-0/+0
| | | | | | | | | | | | | | | | | Updating from commit id a4c979ade: 2020-08-26 14:59:05 +0000 - (Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration) to commit id 7ad39818b: 2020-10-12 09:16:21 +0000 - (Merge "mediatek: mt8192: add GIC600 support" into integration) This brings in 222 new commits. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Id186df36d90563f94f17cc210a6f634adc4ec61e Reviewed-on: https://review.coreboot.org/c/coreboot/+/51463 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* Update amd_blobs submodule to upstream masterMartin Roth2021-03-151-0/+0
| | | | | | | | | | | | | | | | | | Updating from commit id 3b1a734: 2021-03-02 11:51:18 -0700 - (picasso: Update FSP to build 0x26) to commit id 3a9d7cd: 2021-03-03 15:37:08 -0700 - (picasso: Update Dali SMU firmware) This brings in 1 new commits. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Iff3b4ff667f97d3804bc66477f8a95a60e23b1a0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51459 Reviewed-by: Mathew King <mathewk@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Update blobs submodule to upstream masterMartin Roth2021-03-151-0/+0
| | | | | | | | | | | | | | | | | Updating from commit id 4fdfa1c: 2021-03-05 13:10:22 -0600 - (mb/amd/majolica: Update to use proper APCBs built for Majolica) to commit id fc2d4e2: 2021-03-12 10:31:48 -0700 - (mb/google/guybrush: Add initial APCB) This brings in 1 new commit. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I3003fdb8ba0bcfbc33452999c35a9a21775ecc10 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51462 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mathew King <mathewk@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* mb/amd/majolica: Update to use proper APCBs built for MajolicaMatt Papageorge2021-03-101-0/+0
| | | | | | | | | | | | | | | | Some of the previous binaries were incorrect and should not be used for Majolica because they are templates instead of APCBs specifically built for the board. This APCB update also places the UMA region under 4G and size 32 MB which is essential for video output. TEST=Boot with UEFI BIOS and verify we can get to OS. Also verify memory region size, base and alignment. Change-Id: Id797e2ad5bd67815c09752aedc19dad7dcf8ad12 Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51014 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* amd_blobs: update submodule pointerNikolai Vyssotski2021-03-031-0/+0
| | | | | | | | | | | | Pick up build 0x26 Picasso FSP binaries. The changes include increased FSPS UPD block size from 0x152 to 0x202. Change-Id: I11fc199ca7bc6ee7431c59d35a60d9ebd977bf10 Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51193 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
* amd_blobs: Update cezanne PSP Secure OSMarshall Dawson2021-03-011-0/+0
| | | | | | | | | | | | Avoid a Secure OS Abort. This prevents coreboot timing out on C2P mailbox commands and allows HDT unlocking. Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I358530a1ba959ee1896e26a47853c9918ee124b4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51109 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* amd_blobs: Add cezanne whitelist bootloaderMarshall Dawson2021-03-011-0/+0
| | | | | | | | | | Advance the pointer to pick up the PSP whitelist bootloader. Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I45da509ee6f782cbe64e7099f3945129282060b4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51102 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* 3rdparty/blobs: advance submodule pointer.Ritul Guru2021-02-111-0/+0
| | | | | | | | | | This adds the apcb binary for Bilby. Change-Id: I1487369bc72734e875c5a701f27ed2d6af41cd01 Signed-off-by: Ritul Guru <ritul.bits@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50496 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* Update chromeec submodule to upstream masterPatrick Georgi2021-02-061-0/+0
| | | | | | | | | | | | | | | | Updating from commit id a1afae4: 2019-10-02 11:47:45 +0000 - (juniper: initial setup) to commit id a2390f3: 2020-12-01 08:35:44 +0000 - (servo_v4/usb_pd_policy: Reject SNK->SRC power swap if CC_ALLOW_SRC not set) This brings in 4022 new commits. Change-Id: Ib13921aa78a60f88455223eff602296abc424ca8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48212 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/intel-microcode: Update submodule to 20201118 releaseTim Crawford2021-01-231-0/+0
| | | | | | | | | | | | | | Update submodule pointer to include microcode for CML-H and others. Change-Id: Ide211b0b163f824a3cfa6500a73aea1e2176c652 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47914 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: advance submodule pointerFelix Held2021-01-191-0/+0
| | | | | | | | | | | | | | | | | | | | | | | This pulls in the following changes: * Drop geode_lx * cpu/amd/model_fxx: Drop unused microcode * cpu/amd/model_10xx: Drop unused microcode * soc/mediatek/mt8192: Add dram.elf for DRAM full calibration * soc/mediatek/mt8192: Add dpm binary * soc/mediatek/mt8192: Add 4266Mbps flag for dpm & dram blob * soc/mediatek/mt8192: add SPM firmware * soc/mediatek/mt8192: Support 26M clock off in SPM * soc/mediatek/mt8192: Add SSPM firmware * soc/mediatek/mt8192: Add MCUPM firmware * soc/mediatek/mt8192: Update MCUPM firmware * soc/mediatek/mt8192: Support discrete DRAM modules * mb/amd/majolica: Add APCB configuration files Change-Id: I5c18349307421707fac71f392b785f3e2bef3acb Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49675 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* amd_blobs: Add new picasso VBIOSMarshall Dawson2021-01-141-0/+0
| | | | | | | | Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: Icf1571ae360cee5698626f0360e1408360e8a7f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49362 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* amd_blobs: Advance pointer for picasso FSP 0x25Marshall Dawson2021-01-081-0/+0
| | | | | | | | | Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I2aa5f353432cd8f79005153a06ac35c1e654f6f1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49223 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* 3rdparty/libgfxinit: Update for Cannon Point supportNico Huber2020-12-281-0/+0
| | | | | | | | | | | | | We missed that Cannon Point, the PCH usually paired with Coffee, Whiskey and Comet Lake, differs a bit from its predecessors. Hence, libgfxinit now has a new Kconfig setting for the PCH. Change-Id: I1c02c0d9abb7340aabe94185ee5e17ef4c2b0d36 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48764 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* 3rdparty/fsp: Update submodule pointer to newest masterFelix Singer2020-12-241-0/+0
| | | | | | | | | | Newest master introduces the FSP for Tiger Lake client SKUs. Change-Id: Id437faf72f1b8c5bc5310596bdab980e64614fa0 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48712 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* amd_blobs: Add cezanne filesMarshall Dawson2020-12-171-0/+0
| | | | | | | | | | Add blobs from the 1.0.0.1 release of CezannePI-FP6. Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: Iebfbe819ed429a7aed1882964061e1bc98f3bc39 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48647 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* 3rdparty/amd_blobs: Update pointer for picasso SMU and FSPMarshall Dawson2020-12-021-0/+0
| | | | | | | | | | | Add the newest SMU firmware and FSP blobs for the picasso project. This supports Picasso, Dali, and Pollock devices. Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I75e6f3d2a59ed8b2e42afba3a6978574373ec4e5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48211 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* Update vboot submodule to upstream masterPatrick Georgi2020-11-251-0/+0
| | | | | | | | | | | | | | | | Updating from commit id 9d4053d: 2020-11-20 01:51:08 +0000 - (Revert "Reland: Clean up implicit fall through.") to commit id 48195e5: 2020-11-24 10:23:45 +0000 - (Makefile: Test for warning flags before using them) This brings in 3 new commits. Change-Id: I64f27f346df264cb6eeeb4e3203fcca7d35f7e83 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47906 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
* Update vboot submodule to upstream masterJulius Werner2020-11-211-0/+0
| | | | | | | | | | | | | | | | | | | Updating from commit id 4c523ed1: vboot2: Add support for modexp acceleration to commit id 9d4053df: Revert "Reland: Clean up implicit fall through." This brings in 32 new commmits. Among the changes are restored support for older GCC/clang versions that do not support __attribute__((fallthrough)). Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I1110664bf71b4376bcdd9ba934a95031ba872c1d Reviewed-on: https://review.coreboot.org/c/coreboot/+/47784 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* 3rdparty/amd_blobs: update submodule pointerFelix Held2020-10-211-0/+0
| | | | | | | | | | | | | This now tracks a recently created upstream repository located at https://github.com/amd/firmware_binaries BUG=b:166107781 Change-Id: Ib193d646bb51cbf7b86f46828033e619c3f70e16 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46594 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: advance submodule pointerFelix Held2020-10-201-0/+0
| | | | | | | | | | | | | | | | The 3 commits commits from the blob repository this patch pulls in remove executable flags from files in the repo that shouldn't have those flags set: * pi/amd/00660F01/FP4/AGESA.bin: Remove execute file mode bit * Remove execute permission from all binaries * Remove execute permission from plaintext files Change-Id: I9c2b7c69f07e46bac466bfbfb277595c9fbc5a5a Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46554 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Update vboot submodule to upstream masterKangheui Won2020-10-071-0/+0
| | | | | | | | | | | | | | | | | | Updating from commit id 4bb06cc1: COIL: Change denylist to blocklist to commit id 4c523ed1: vboot2: Add support for modexp acceleration This brings in 10 new commmits. Change-Id: Iff6eb99c8ed3046b6fdb6c1e2892aab956f3b562 Signed-off-by: Kangheui Won <khwon@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45986 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Eric Peers <epeers@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* 3rdparty/blobs: advance submodule pointerFelix Held2020-09-301-0/+0
| | | | | | | | | | | | This pulls in the following changes: * soc/intel/baytrail/microcode.bin: Remove outdated microcode * mainboard/amd/mandolin: add Cereme APCB Change-Id: If6dd7881b346782635dec07710fe5c4449254e3c Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45851 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty: Add STM as a submoduleEugene D Myers2020-09-301-0/+0
| | | | | | | | | | | | | The patch incorporates the STM build as a part of the coreboot build. A separate patch lists and documents the options that the developer can use. In most cases the default options will suffice. Change-Id: I8c6e0c85edd4e2b0658791553bd9947656e8c796 Signed-off-by: Eugene D Myers <cedarhouse@comcast.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44687 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ron minnich <rminnich@gmail.com>
* Update amd_blobs submodule to upstream masterMatt Papageorge2020-09-171-0/+0
| | | | | | | | | | | | | | | | | Updating from commit id 3bd9078: 2020-08-12 17:03:38 -0600 - (picasso: Update PSP to 0.8.6.7B) to commit id e393a88: 2020-09-16 14:32:50 +0000 - (Update SMU firmware for Picasso, Pollock and Dali) This brings in 1 new commits. Change-Id: I1e317cf6ef4803577e9b353fb3313d001db228d7 Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45455 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Update vboot submodule to upstream masterIdwer Vollering2020-09-121-0/+0
| | | | | | | | | | | | | | | | | Updating from commit id fefcaa65: vboot: adjust VB2_SECDATA_KERNEL_FLAGS in non-recovery path to commit id 4bb06cc1: COIL: Change denylist to blocklist This brings in 20 new commmits. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Change-Id: I0efef2f0ab6ecb89c8132cca2bd4ab7f71e85ced Reviewed-on: https://review.coreboot.org/c/coreboot/+/45299 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty: Add submodule intel-sec-toolsPhilipp Deppenwiese2020-09-091-0/+0
| | | | | | | | | | | | | | Project: https://github.com/9elements/converged-security-suite License: BSD-3 Tooling for Intel platform security features Change-Id: I7421b30eb38e64cf6b77b7e1c485c5700728997b Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45170 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/qc_blobs: Uprev to new HEAD (6b7fe498eb)Julius Werner2020-09-091-0/+0
| | | | | | | | Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I2de0c13000e5b1e32e9c1a6de3daa09acf6c321b Reviewed-on: https://review.coreboot.org/c/coreboot/+/45057 Reviewed-by: Philip Chen <philipchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/fsp: Update submodule pointer to current masterFelix Singer2020-09-031-0/+0
| | | | | | | | Change-Id: I50bac5a70425495832649e0d6d6e91aad623f25c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
* Update arm-trusted-firmware submodule to upstream masterJulius Werner2020-08-311-0/+0
| | | | | | | | | | | | | | | | | Updating from commit id ace23683b: 2019-09-27 Merge changes from topic "ld/stm32-authentication" into integration to commit id a4c979ade: 2020-08-26 Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration This brings in 1825 new commits. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Id26301dae421eec61c10a2d18842053f3228c557 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44885 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Update vboot submodule to upstream masterKangheui Won2020-08-281-0/+0
| | | | | | | | | | | | | | | | | | | Updating from commit id 3932b1c: 2020-08-19 02:09:04 +0000 - inclusive: change usage of blacklist/whitelist to commit id fefcaa6: 2020-08-24 04:32:03 +0000 - vboot: adjust VB2_SECDATA_KERNEL_FLAGS in non-recovery path This brings in 2 new commits. Change-Id: Ia3ff764537b91f76ba6fa3ba2646638964800510 Signed-off-by: Kangheui Won <khwon@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44732 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* 3rdparty/vboot: Update to latest masterPatrick Georgi2020-08-201-0/+0
| | | | | | | | | | | This also includes https://chromium-review.googlesource.com/2318026 which fixes an issue with duplicate symbols. Change-Id: Icf450616b3bcd8b7c01261c913cd172625dbd6ba Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* 3rdparty/amd_blobs: Move the pointer for picasso updateMarshall Dawson2020-08-131-0/+0
| | | | | | | | | | | | | Update PSP to 0.8.6.7B. BUG=b:163857965 TEST=none Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I634dadccc51b36f9ac25c3238a794564ce580d5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/44427 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/intel-microcode: Update submodule to 20200616 releaseAngel Pons2020-08-081-0/+0
| | | | | | | | | | Change-Id: Ia250765e2cb81d6a39ad00ebbab20e7b87fa42d1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43758 Reviewed-by: Michael Niewöhner Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/amd_blobs: Move pointer to 0.8.5.7BMarshall Dawson2020-07-301-0/+0
| | | | | | | | | | BUG=b:162057232 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: Ifd4ac0655f7ada5ec10a266fdb2b930861959215 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44040 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/vboot: Update submodule pointer to upstream masterPaul Menzel2020-07-271-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building depthcharge master currently fails as depthcharge commit 74ca8ae5 (depthcharge: Hide dev mode timeout description) changed the function signature according to vboot commit 59fd331b (vboot/ui: pass timer_disabled to vb2ex_display_ui()), which is not yet present in the vboot checkout: $ make […] CC drivers/ec/vboot_auxfw.depthcharge.o src/drivers/ec/vboot_auxfw.c: In function 'display_firmware_sync_screen': src/drivers/ec/vboot_auxfw.c:117:5: error: too many arguments to function 'vb2ex_display_ui' vb2ex_display_ui(VB2_SCREEN_FIRMWARE_SYNC, ^~~~~~~~~~~~~~~~ In file included from /dev/shm/coreboot-1/3rdparty/vboot/firmware/include/vb2_api.h:18, from src/drivers/ec/vboot_auxfw.c:17: /dev/shm/coreboot-1/3rdparty/vboot/firmware/include/../2lib/include/2api.h:1262:13: note: declared here vb2_error_t vb2ex_display_ui(enum vb2_screen screen, ^~~~~~~~~~~~~~~~ So update the submodule pointer from commit 68de90c7 (Allow building for non-CrOS environments) to commit ed23c084 (Reset EC when transitioning to dev mode). This brings in 7 new commits. Change-Id: Icd5408fb824fc5da470774b7f493b916dff17832 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43517 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Joel Kitching <kitching@google.com>
* 3rdparty/libgfxinit: Update submodule pointerAngel Pons2020-07-201-0/+0
| | | | | | | | | | | | | | This brings in 4 new commits: * c0db994 common/Makefile.inc: Factor out generation TLAs * 3f86b0b Move `PSR_Off` out of `Power_And_Clocks_Haswell` * 450c24c haswell: Make VGA on FDI work * 3318bf2 Drop generation suffix from `Power_And_Clocks` Change-Id: I023b0c2bb403b3a9c9fe575a78cd2cf2f20b112a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43559 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* 3rdparty/libhwbase: Update submodule pointerAngel Pons2020-07-201-0/+0
| | | | | | | | | | | | | | | This brings in 5 new commits: * 69e9086 mutime: Make Sinfo an imported constant * 9f87a10 time: Add T_First constant * 4e22910 Makefile: Adapt $(space) definition * d822df5 Makefile: Delay expansion of `$(ADAFLAGS)` * a3edc6e Makefile: Add `-gnatw_R` to suppress spurious warning Change-Id: I907e66fcf85da256a112a7069a3c551a6d8caaf0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43558 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Update vboot submodule to upstream masterPatrick Georgi2020-07-031-0/+0
| | | | | | | | | | | | | | | | | | Updating from commit id c531000f: 2020-05-18 20:55:55 +0000 - (vboot: Add recovery reason code for CSE Lite SKU errors) to commit id 68de90c7: 2020-07-02 11:31:05 +0000 - (Allow building for non-CrOS environments) This brings in 59 new commits. Change-Id: I7f3c30511ff4acc60e3581bdab89d685dc7beaa5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43008 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/amd_blobs: Update Picasso PSP filesMarshall Dawson2020-07-011-0/+0
| | | | | | | | Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I752804919227c1522374b93e08abee13396b2679 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42893 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* Add qc_blobs repositoryJulius Werner2020-06-301-0/+0
| | | | | | | | | | | | | | | | | | | This patch adds a separate blobs repository for Qualcomm blobs, analogous to the existing AMD blobs. Qualcomm's binary licenses allow files to be redistributed and used by anyone, but they explicitly require the user to agree to the license terms when just *downloading* the binary (even if they're not using them to build any firmware). Some community members do not like to have to agree to licenses for files they're not actually using, so we are keeping these files separate from the main blobs repository and adding an extra Kconfig to make sure the user is aware of and must explicitly agree to this before downloading these files. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I247746c1b633343064c9f32ef1556000475d6c4a Reviewed-on: https://review.coreboot.org/c/coreboot/+/42548 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* 3rdparty/blobs: advance submodule pointerFelix Held2020-06-191-0/+0
| | | | | | | | | | | | | | | Changes in 3rdparty/blobs: * Update of the OCP Tiogapass Flash descriptor binary * Move binary policy as README.md * Markdownify README.md * Add APCB binary for AMD Mandolin Change-Id: I0c45969626f30dca42bba1f137e85ec0999fc671 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42544 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* 3rdparty/amd_blobs: advance submodule pointerFelix Held2020-06-151-0/+0
| | | | | | | | | | | | | This pulls in a newer version of the PSP-related blobs. Change-Id: I6ff39260e9697512f78eb68435bd17ea83af35d5 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42346 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* 3rdparty/amd_blobs: Update to include APCB_magic.binRaul E Rangel2020-05-271-0/+0
| | | | | | | | | | | | | BUG=b:157140753 TEST=Built zork/trembyle and boot to OS. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I30a27a149ee7f368f45fdf5d4a081127f15e7629 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41736 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Furquan Shaikh <furquan@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-28 12:37:49 +0000