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* test whether post commit hooks work again on v3 repo.coreboot-v3Stefan Reinauer2010-05-141-1/+1
| | | | | | | | | Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1179 f3766cd6-281f-0410-b1cd-43a5c92072e9
* use relative externals so people who can't use svn:// are not locked out.Stefan Reinauer2010-05-140-0/+0
| | | | | | | | | | | | | | Sorry, this needs subversion 1.5 or newer. But updating svn is easier for the average developer than opening their corporate firewall. See http://subversion.apache.org/docs/release-notes/1.5.html#externals Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1178 f3766cd6-281f-0410-b1cd-43a5c92072e9
* back out all changes made by me since r1163. They were basically allStefan Reinauer2009-08-2429-925/+924
| | | | | | | | | | | | | coreboot-v2 only. This gets you guys a compiling v3 tree again. Sorry for the inconvenience. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1177 f3766cd6-281f-0410-b1cd-43a5c92072e9
* drop flashrom from svn:externals as we did in v2 a while ago..Stefan Reinauer2009-08-240-0/+0
| | | | | | | | | Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1176 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Prepare for kconfig: Rename COREBOOT_V2 to CONFIG_COREBOOT_V2Patrick Georgi2009-08-0516-25/+25
| | | | | | | | | | and adapt its user (x86emu) to match. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1175 f3766cd6-281f-0410-b1cd-43a5c92072e9
* trivial: print a message on return. fix typo Rom -> ROM.Stefan Reinauer2009-07-191-1/+2
| | | | | | | | | Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1174 f3766cd6-281f-0410-b1cd-43a5c92072e9
* commit svn:externals for previous commit (2/2)Stefan Reinauer2009-06-3014-79/+79
| | | | | | | | | Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1173 f3766cd6-281f-0410-b1cd-43a5c92072e9
* There are some problems with the way these interrrupts were Ronald G. Minnich2009-06-091-49/+1
| | | | | | | | | | | | | | | | | | | managed. First, the CLI erases any knowledge of whether interrupts were enabled or disabled. Second, the STI works badly on qemu; we get an immediate INT #0 as soon as the STI happens. This spurious interrupt doesn't happen on real hardware (YET!)but, that said, I don't think this code should be doing cli and sti. I can't see a reason to enable interrupts at this point in coreboot. This change fixes the observed qemu failures. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1172 f3766cd6-281f-0410-b1cd-43a5c92072e9
* rename VM86 to REALMODE in v3, too, as that is what it really is.Stefan Reinauer2009-06-075-13/+13
| | | | | | | | | | | (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1171 f3766cd6-281f-0410-b1cd-43a5c92072e9
* rename the option CONFIG_PCI_OPTION_ROM_RUN_VM86 to ↵Joseph Smith2009-05-292-5/+5
| | | | | | | | | CONFIG_PCI_OPTION_ROM_RUN_REALMODE. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1170 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Header file consistency fixes (no functional changes).Uwe Hermann2009-05-293-35/+38
| | | | | | | | | Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1169 f3766cd6-281f-0410-b1cd-43a5c92072e9
* and empty files should be deleted, not set to 0 bytes. Sorry for the noise.Stefan Reinauer2009-05-292-0/+0
| | | | | | | | | Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1168 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Part II - svn externals need to be committed separatelyStefan Reinauer2009-05-298-824/+869
| | | | | | | | | | | | | | | | drop most of the crappy vm86 code and replace it with a rewritten version that has all assembler in a .S file and all C code in a .c file. Also, remove requirement to move around between GDTs. This version includes the suggestions from Peter to clean up CR0 manipulation and to guard critical code paths by cli/sti. Tested and working on my hardware. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1167 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Revert "This is an emergency fix for building for qemu. "Mart Raudsepp2009-05-091-5/+0
| | | | | | | | | This reverts r1162 because r1161 was a better and more universal fix. Signed-off-by: Mart Raudsepp <leio@gentoo.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1166 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Update URL for flashrom.Patrick Georgi2009-04-270-0/+0
| | | | | | | | Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1165 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Enable caching for Via C7 CPUs, and also improve readability. Tested on hardwareCorey Osgood2009-04-143-20/+23
| | | | | | | | | | | and seems to be working. Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1164 f3766cd6-281f-0410-b1cd-43a5c92072e9
* remove unnecessary function definitionPattrick Hueper2009-04-141-1/+0
| | | | | | | Signed-off-by: Pattrick Hueper <phueper@hueper.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1163 f3766cd6-281f-0410-b1cd-43a5c92072e9
* This is an emergency fix for building for qemu. Ronald G. Minnich2009-03-231-0/+5
| | | | | | | | | | With this fix, FILO works. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1162 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Emergency fixup for the missing is_coldboot().Carl-Daniel Hailfinger2009-03-201-0/+11
| | | | | | | | | | | Note that the weak is_coldboot() returns always 1. The i945 is_coldboot() returns 1 for a warm boot? Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1161 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Fix evil typo resulting in a compile failure.Carl-Daniel Hailfinger2009-03-191-1/+1
| | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1160 f3766cd6-281f-0410-b1cd-43a5c92072e9
* v3 vtxprintf(): Stop looking for non-ASCII characters after one has been found.Peter Stuge2009-03-191-1/+4
| | | | | | | | | | And update the string length. Many thanks to Mathias Krause for spotting this! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1159 f3766cd6-281f-0410-b1cd-43a5c92072e9
* This patch tries to make printk more readable and reliable.Carl-Daniel Hailfinger2009-03-191-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Base 16 number printing used digits[33] instead of the more readable 'x' for the "0x" prefix. That means you have to look up an array just to find out what the code does. Change it. We already write "<NULL>" if printk gets a NULL pointer as string argument. Introduce "<near NULL>" for string arguments with addresses below 0x400. This error happened in the past when dereferencing a struct member with a string and the struct had the address NULL. Check if all to-be-printed characters in the string are indeed printable. The idea is to catch garbage strings from stray pointers and print "<non-ASCII characters>" instead. If a string contains characters outside classic ASCII printable stuff, this will trigger. An example would be characters with diacritic marks like äöüéăçőč. Then again, I don't see localized versions of coreboot on the horizon. Maybe for payloads, but not for coreboot itself. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1158 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Changed RAM speed calculation to fix RAM modules getting rejected onlyCarl-Daniel Hailfinger2009-03-191-11/+10
| | | | | | | | | | | | | | | | | | | | | | due to integer rounding errors. Previously, the formula was: speed = 2 * (10000/spd_value) For spd_value=60 this means speed = 2 * 166 = 332, which is less than 333 and coreboot died saying RAM was incompatible. The new formula is: speed = 20000 / spd_value For spd_value=60, speed=333, which is fine. Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Mart writes: Tested on ThinCan DBE63 to fix the issue of 333 > 332 comparison for RAM modules I had problems with before due to bailing out in the overclocking check. Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1157 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Output GeodeLink and RAM speed in case of overclock error to make things ↵Mart Raudsepp2009-03-191-0/+1
| | | | | | | | | more clear. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1156 f3766cd6-281f-0410-b1cd-43a5c92072e9
* "other device" support for YABEL PCI Config Space AccessesPattrick Hueper2009-03-182-26/+64
| | | | | | | | | | | This patch makes it possible for Option ROMs to access devices other than the one YABEL is running for. This is needed for some onboard Graphics Cards Option ROMs. Signed-off-by: Pattrick Hueper <phueper@hueper.net> Tested and Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1155 f3766cd6-281f-0410-b1cd-43a5c92072e9
* add YABEL flag to options to decide wether access to devices other than the ↵Pattrick Hueper2009-03-181-0/+8
| | | | | | | | | one yabel is running for is possible Signed-off-by: Pattrick Hueper <phueper@hueper.net> Tested and Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1154 f3766cd6-281f-0410-b1cd-43a5c92072e9
* update Copyright on YABEL files i modifiedPattrick Hueper2009-03-1814-4/+14
| | | | | | | Signed-off-by: Pattrick Hueper <phueper@hueper.net> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1153 f3766cd6-281f-0410-b1cd-43a5c92072e9
* update documentation of yabel debug flagsPattrick Hueper2009-03-171-0/+22
| | | | | | | Signed-off-by: Pattrick Hueper <phueper@hueper.net> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1152 f3766cd6-281f-0410-b1cd-43a5c92072e9
* fix warnings in ops.cPattrick Hueper2009-03-161-38/+16
| | | | | | | Signed-off-by: Pattrick Hueper <phueper@hueper.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1151 f3766cd6-281f-0410-b1cd-43a5c92072e9
* add intFuncArray to be able to override INT handlers from YABEL callerPattrick Hueper2009-03-143-42/+60
| | | | | | | Signed-off-by: Pattrick Hueper <phueper@hueper.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1150 f3766cd6-281f-0410-b1cd-43a5c92072e9
* use CONFIG_YABEL_DEBUG_FLAGS when setting debug_flagsPattrick Hueper2009-03-141-1/+4
| | | | | | | Signed-off-by: Pattrick Hueper <phueper@hueper.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1149 f3766cd6-281f-0410-b1cd-43a5c92072e9
* add YABEL Debug Flag config variablePattrick Hueper2009-03-141-0/+6
| | | | | | | Signed-off-by: Pattrick Hueper <phueper@hueper.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1148 f3766cd6-281f-0410-b1cd-43a5c92072e9
* remove vbe.c from build list, it's not used in v3 either, and it's not well ↵Stefan Reinauer2009-03-131-1/+1
| | | | | | | | | | | tested yet. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1147 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Enable the use of scan-build on the coreboot-v3 tree, tooPatrick Georgi2009-03-113-9/+34
| | | | | | | | | | | It requires a flag (CONFIG_SCAN_BUILD) to be set, and then $ scan-build make Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1146 f3766cd6-281f-0410-b1cd-43a5c92072e9
* last kontron commit. Ronald G. Minnich2009-03-119-53/+258
| | | | | | | | | | | | | | | This is a potentially good pointer to where someone can take this. While startup was working, BSP now explodes once the AP stops, while BSP is doing startup IPI loop send #2. The code needs to be hardened; I think use of the shared variables would really make it much more solid. This would be a good undergrad student project if someone is looking for one. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1145 f3766cd6-281f-0410-b1cd-43a5c92072e9
* YABEL: fix 32bit cf8/cfc PCI Config accessesPattrick Hueper2009-03-051-2/+2
| | | | | | | Signed-off-by: Pattrick Hueper <phueper@hueper.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1144 f3766cd6-281f-0410-b1cd-43a5c92072e9
* This is working up to the ljmpl to protected mode. It has all the Ronald G. Minnich2009-03-051-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | debugging in, using locations 0 and _secondary_start as POST. Calling from initram did not work out, as we have to disable_car in initram to make such a call work (on core2). For now, I am calling this from stage1_phase 3, before stage2 is called. But that has increased the code size of stage1, which is not a great idea. What I am thinking we ought to do: call this from stage2, before phase 1, so that CPUs are nice and set up and quiet. Provide phase2 with an SMP-safe printk. This is here so others may see it and correct my work. The good news is that SMP startup on core2 on v3 is now starting to go. But the better news is that the way this is working is pretty generic and ought to apply to much more than just core2. To really look at object you might want to get ndisasm. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1143 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Trivial patch to make v3 compile too.Stefan Reinauer2009-03-0116-25/+25
| | | | | | | | | Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1142 f3766cd6-281f-0410-b1cd-43a5c92072e9
* This patch contains the necessary changes to util/x86emu of the v3 tree to useStefan Reinauer2009-03-0121-16/+165
| | | | | | | | | | | | it in the v2 tree as well. Requires the yabel-prereq.diff patch in order to work in v2. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1141 f3766cd6-281f-0410-b1cd-43a5c92072e9
* This patch removes all *_PLUGIN_SUPPORT options and replaces mostMyles Watson2009-02-255-48/+41
| | | | | | | | | | | | | | | | | | | *_SUPPORT options with NO_*_SUPPORT options. This means that you have to specify that you want a smaller BIOS, otherwise you get full functionality. HyperTransport is the only exception for a couple of reasons. HT requires a mainboard.h file which not all mainboards have, and it's less likely to be "plugged in" to a board that doesn't have some onboard HT. It also fixes a trivial typo in Kconfig (paylaod -> payload) Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1140 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Again, this probably won't work but I want to make the code visible so Ronald G. Minnich2009-02-242-5/+6
| | | | | | | | | | | people can suggest what's wrong. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1139 f3766cd6-281f-0410-b1cd-43a5c92072e9
* cs5536: Make NAND code optional and implement timing settingMart Raudsepp2009-02-239-54/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The reset value for NAND timings is the slowest possible for Flash interface. Implement optionally setting it to a different value inside the NAND device. Set it to appropriate values for Artec Group DBE61 and DBE62. This results in a roughly two times quicker read time as measured by hdparm for these boards. Because we can not cast to southbridge_amd_cs5536_nand_config if the board dts does not have an entry for the NAND device, this change proposes a method for reasonably clean way to only optionally compile in support for certain devices: If a board wants to support an optional device, its Kconfig entry can select that configuration. If it's optional even across the same board, it can expose a subconfig option of the board, that describes it and if chosen selects the device config. The source code for that device is conditionally compiled only if the Kconfig option gets enabled by the configuration for the board. A requirement is that if the board configuration can enable a device, it is contained in the boards dts file as well. A perhaps better long-term alternative for this could be making dtc generate preprocessor definitions for each device_configuration struct that it creates. Then the source code file is always enabled, but that file can be wrapped around a simple #ifdef check in its entirety. Conversion to the alternative approach from the short-term Kconfig approach proposed here should be relatively easy, as to not block inclusion of the Kconfig approach in the short term. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1138 f3766cd6-281f-0410-b1cd-43a5c92072e9
* This is a trivial commit and I want to get other people to look at the code. Ronald G. Minnich2009-02-212-11/+13
| | | | | | | | | | | | I can still get to linux but core1 is not working. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1137 f3766cd6-281f-0410-b1cd-43a5c92072e9
* This patch extends core2 smp support to v3. It is an Ronald G. Minnich2009-02-219-18/+694
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | adaption of the v2 code, with significant cleanup and simplification. It also works in CAR mode, and has no .bss or .data usage. It provides for a way to provide AP POST codes to the BSP. Since one common file with amd changed (lapic.h) I have build-tested this against serengeti and it is fine. It builds and I'll be testing it as soon as I can find the power supply for the kontron (it got "borrowed"). Index: arch/x86/intel/core2/init_cpus.c new file. Basically an adaptation of the v2 code to v3. All global variables removed. One big change to note: there is a stack struct, and the parameters to the secondary_start are struct members. Thus the BSP can watch the AP, and, neater, the AP can POST to a shared variable and the BSP can see how far it got. Index: arch/x86/secondary.S .S startup for AP. Index: arch/x86/Kconfig Delete a dependency. Index: northbridge/intel/i945/reset_test.c Add real cold boot detection. Index: mainboard/kontron/986lcd-m/Makefile Add some new build files. Index: mainboard/kontron/986lcd-m/stage1.c Get rid of ' in #warning that confused some tool. Index: mainboard/kontron/986lcd-m/initram.c Call init_cpus. Index: mainboard/kontron/Kconfig Turn off SMM for now. Index: include/arch/x86/lapic.h Correct a static inline declaration. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1136 f3766cd6-281f-0410-b1cd-43a5c92072e9
* The initram build allows you to -fcombine the source. But if you put a Ronald G. Minnich2009-02-191-2/+11
| | | | | | | | | | | | | | | | | | | | | | | .S into the source file list, for reasons unknown, gcc only builds a .o with the .S symbols/code in it; all the .c bits disappear. So, a few changes: 1. add a rule for secondary.o, we're going to need it. I like the fact that adding a .S file is inconvenient. Good. Adding assembly should be hard. 2. Make two steps to initram .o building: first, the .c files, then any extra .o files as specified by the mainboard Makefile I realize this is a bit ugly, if there is a better solution, I'll take it. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1135 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Add this file from v2. Not build tested, just want to get it in.Ronald G. Minnich2009-02-181-0/+75
| | | | | | | | Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1134 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Improve the setup of MTRRs in stage1 to handle alignment and power ofMarc Jones2009-02-153-49/+162
| | | | | | | | | | | 2 size calculations. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1133 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Fix missing indirection for CONFIG_PCI_64BIT_PREF_MEM. That config stillCarl-Daniel Hailfinger2009-02-131-1/+1
| | | | | | | | | | does not compile, but this needed fixing anyway. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1132 f3766cd6-281f-0410-b1cd-43a5c92072e9
* This patch converts __FUNCTION__ to __func__, since __func__ is standard.Myles Watson2009-02-1220-186/+186
| | | | | | | | Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1131 f3766cd6-281f-0410-b1cd-43a5c92072e9
* Convert \r\n to \n in v3.Myles Watson2009-02-123-3/+3
| | | | | | | | Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1130 f3766cd6-281f-0410-b1cd-43a5c92072e9
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