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* soc/intel/cannonlake: Fix PCH-H IRQ constraintsAngel Pons2021-08-251-0/+6
* mb/google/brya/variants/gimble: Correct I2C slave address and update gpio.cMark Hsieh2021-08-252-2/+5
* mb/google/dedede/var/galtic: modify touchscreen to native I2C protocolFrankChu2021-08-251-12/+10
* mb/google/dedede/var/sasukette: Update DPTF parametersZanxi Chen2021-08-251-1/+9
* mb/goog/bry/var/redrix: Enable Genesys GL9755 settingWisley Chen2021-08-251-0/+1
* soc/intel/tigerlake: Hook up ucode for TGL-HTim Crawford2021-08-251-0/+4
* mb/google/brya/primus: modify HID to MX98357A to enable audio functionCasper Chang2021-08-251-1/+1
* mb/google/brya: Fix PL4 limitsTim Wawrzynczak2021-08-252-4/+7
* mb/google/brya/variants/kano: Init devicetree for kanoDavid Wu2021-08-244-1/+465
* mb/google/brya: Enable SaGv supportV Sowmya2021-08-241-1/+1
* mb/google/brya: Enable DRIVERS_GENESYSLOGIC_GL9755 for primusMalik_Hsu2021-08-241-0/+1
* mb/google/dedede/var/cret: Add new G2Touch touchscreenDtrain Hsu2021-08-241-0/+19
* mb/google/brya/var/felwinter: Generate RAM ID and SPD fileEric Lai2021-08-243-13/+12
* soc/intel/broadwell: Move `pei_data` out of romstage.cAngel Pons2021-08-243-36/+39
* soc/intel/broadwell: Do early ME init a bit earlierAngel Pons2021-08-241-7/+7
* soc/intel/tigerlake: Add USB ACPI devices for PCH-HJeremy Soller2021-08-242-0/+48
* soc/intel/tigerlake: Add SPI_DMI_DESTINATION_ID for PCH-HJeremy Soller2021-08-241-0/+4
* soc/intel/tigerlake: Set UserBd to recommended default for PCH-HJeremy Soller2021-08-241-1/+4
* soc/intel/tgl: Add PCR_PSF3_T0_SHDW_PMC_REG_BASE for PCH-HJeremy Soller2021-08-241-0/+4
* soc/intel/tigerlake: Add TGL-H PEG portsJeremy Soller2021-08-244-1/+39
* soc/intel/tigerlake: Add PCIe root ports for PCH-HJeremy Soller2021-08-243-5/+207
* soc/intel/tigerlake: Add PCH-H GPIO definitionsJeremy Soller2021-08-2410-8/+1110
* soc/intel/tigerlake: Add PCH-H PMC GPE group definitionsJeremy Soller2021-08-241-0/+17
* soc/intel/tigerlake: Add PCH-H chipset devicetreeJeremy Soller2021-08-242-0/+196
* soc/intel/tigerlake: Add TGL-H power limitsJeremy Soller2021-08-242-5/+15
* soc/intel: Add TGL-H CPUIDJeremy Soller2021-08-243-0/+3
* Revert "soc/intel/broadwell/pch: Replace ACPI device NVS"Furquan Shaikh2021-08-2410-166/+165
* Revert "soc/intel/broadwell/pch: Drop device NVS remainders"Furquan Shaikh2021-08-245-79/+89
* mb/google/hatch: Create moonbuggy variantRehan Ghori2021-08-237-0/+618
* mb/google/dedede: add gooey variantstanley.wu2021-08-2311-0/+455
* include/bcd: move bcd code to commonlib/bsd/includeRicardo Quesada2021-08-2310-16/+16
* mb/google/guybrush: Enable PCIe L1 SubstatesMatt Papageorge2021-08-232-0/+9
* mb/google/dedede/var/bugzzy: Configure GPIO settingsSeunghwan Kim2021-08-232-0/+61
* soc/mediatek/mt8195: Update clock square settingChun-Jie Chen2021-08-231-2/+8
* soc/mediatek/mt8195: add HDMI low power settingRex-BC Chen2021-08-234-0/+61
* mb/google/brya/var/brya0: Align comments in overridetreePaul Menzel2021-08-221-9/+9
* AGESA f15tn: Fix building IDS tracing supportAngel Pons2021-08-2217-38/+44
* AGESA f15tn: Hook up IDS options to KconfigAngel Pons2021-08-223-26/+62
* AGESA f15tn: Factor out common OptionsIds.hAngel Pons2021-08-228-217/+0
* AGESA f15tn: Drop `IDSOPT_ASSERT_ENABLED`Angel Pons2021-08-2210-94/+0
* AGESA f15tn boards: Sync IDS option valuesAngel Pons2021-08-223-6/+6
* qualcomm/sc7180: Switch to common MIPI panel libraryJulius Werner2021-08-2010-147/+136
* mb/google/brya: Add ALC1019_NAU88L25B supportEric Lai2021-08-203-3/+45
* soc/intel/adl: Update power limits for ADL-M SKUSumeet Pawnikar2021-08-203-0/+10
* soc/intel/adl: Update PCI ID for ADL-M SKUSumeet Pawnikar2021-08-203-3/+3
* mb/google/zork: only enable RTD2141 when presentPeter Marheine2021-08-205-1/+55
* soc/amd/common: Skip psp_verstage on S0i3 resumeMartin Roth2021-08-201-0/+10
* soc/intel/cannonlake: Unbreak some short linesNico Huber2021-08-201-6/+3
* Revert "src/soc/intel/cannonlake: Update C-state latency control limits"Nico Huber2021-08-192-12/+17
* acpi: Fill fadt->century based on KconfigNico Huber2021-08-1921-20/+4
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