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* Make MTRR min hole alignment 64MBDuncan Laurie2012-03-302-3/+9
* Fix MB calculation in the reporting of the MTRR holeDuncan Laurie2012-03-301-1/+1
* MTRR: add alternate allocation method for odd memory mapsDuncan Laurie2012-03-301-7/+45
* Don't re-init EBDA in S3 resume path.Duncan Laurie2012-03-301-0/+9
* Prepare the BIOS data areas before device init.Duncan Laurie2012-03-305-16/+94
* vga_io.c is not needed unless CONFIG_VGA is setStefan Reinauer2012-03-301-1/+1
* Allow components smaller than declared size.Vadim Bendebury2012-03-301-1/+1
* Add Kconfig options to enable TSEG and set a sizeDuncan Laurie2012-03-301-0/+8
* Make cpuid functions usable when compiled with PICDuncan Laurie2012-03-301-12/+45
* Revamp cbmem.py to use the coreboot tables.Gabe Black2012-03-301-109/+158
* drop use of MAX_PHYSICAL_CPUS and MAX_CPUS where not neededStefan Reinauer2012-03-302-7/+1
* Make PCI CONF2 support a compile time optionStefan Reinauer2012-03-303-4/+13
* Add more timestamps in coreboot.Stefan Reinauer2012-03-303-2/+44
* Fix coreboot makefiles not to produce half baked output.Vadim Bendebury2012-03-301-7/+9
* Add timestamps for selfboot and acpi wakeDuncan Laurie2012-03-303-0/+16
* Make TPM driver work in rom stage.Stefan Reinauer2012-03-301-3/+4
* Add TPM support to corebootStefan Reinauer2012-03-306-0/+797
* Add Google ChromeOS vendorcode directoryStefan Reinauer2012-03-304-0/+50
* Add an option to keep the ROM cached after romstageStefan Reinauer2012-03-306-7/+26
* Add native memset() function on x86Stefan Reinauer2012-03-304-0/+95
* Add faster, architecture dependent memcpy()Stefan Reinauer2012-03-304-1/+29
* Add infrastructure for global data in the CAR phase of bootGabe Black2012-03-294-3/+44
* Detect whether the OXPCIE card is really present while in the ROM stage.Gabe Black2012-03-293-4/+26
* Fix typos in src/console/KconfigStefan Reinauer2012-03-291-3/+3
* Add support for enabling PCIe Common Clock and ASPMDuncan Laurie2012-03-294-11/+205
* Refactor publishing CBMEM addresses through coreboot table.Vadim Bendebury2012-03-292-16/+34
* Add timestamp table pointer to the coreboot table.Vadim Bendebury2012-03-292-4/+29
* Introduce utility for parsing CBMEM contents.Vadim Bendebury2012-03-291-0/+204
* CBMEM CONSOLE: Enable coreboot CBMEM console.Vadim Bendebury2012-03-292-0/+4
* CBMEM CONSOLE: Add code using the new console driver.Vadim Bendebury2012-03-294-1/+13
* CBMEM CONSOLE: Add CBMEM type for console buffer.Vadim Bendebury2012-03-292-0/+2
* CBMEM CONSOLE: Add CBMEM console driver implementation.Vadim Bendebury2012-03-294-0/+259
* CBMEM CONSOLE: Add config option for CBMEM stored console log.Vadim Bendebury2012-03-291-0/+27
* Increase CBMEM to accommodate larger console.Vadim Bendebury2012-03-291-0/+5
* Add cmos helper functions for reading/writing a dwordDuncan Laurie2012-03-281-0/+16
* selfboot: Allow loading SeaBIOS into a reserved region in the lower 1MBStefan Reinauer2012-03-281-0/+5
* Include arch/acpi.h instead of manually adding acpi_slp_type.Stefan Reinauer2012-03-281-4/+3
* Add timestamp collecting to coreboot.Vadim Bendebury2012-03-285-0/+140
* Add a config flag to enable time stamp collectionVadim Bendebury2012-03-281-0/+7
* Initialize CBMEM early.Vadim Bendebury2012-03-282-17/+26
* Introduce config option to initialize CBMEM early.Vadim Bendebury2012-03-281-0/+8
* Add bifferboardRudolf Marek2012-03-278-0/+180
* Add 64KB romchip chip sizeRudolf Marek2012-03-271-0/+10
* Add support for RDC R8610 SouthbridgeRudolf Marek2012-03-278-0/+197
* Add the support for RDC R8610 NorthbridgeRudolf Marek2012-03-278-0/+187
* Add RDC R8610 PCI IDs.Rudolf Marek2012-03-271-0/+4
* Fix cleaning SeaBIOS from coreboot makefileMarc Jones2012-03-261-1/+1
* Disable the GDB stub by defaultRudolf Marek2012-03-261-1/+1
* Fix possible deadlock on SMP stop_this_cpuKyösti Mälkki2012-03-251-4/+25
* Intel cpus: Fix deadlock on hyper-threading initKyösti Mälkki2012-03-251-13/+9