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* mb/lenovo/{x200,t400}: Add VBOOT supportArthur Heymans2019-11-046-0/+95
* Documentation: Add some significant 4.11 release notesKyösti Mälkki2019-11-041-0/+18
* mb/google/drallion: Update GPIO tableEric Lai2019-11-041-5/+4
* mb/google/drallion: Correct GPP_E7 as stop pinEric Lai2019-11-041-6/+6
* mb/google/drallion: fix GPP_E16 glitch when enter S5Eric Lai2019-11-041-1/+1
* payloads/external/GRUB2: fix constantly rebuilding due to git checkoutMichael Niewöhner2019-11-041-9/+9
* vendorcode/eltan/security: Correct debug outputWim Vervoorn2019-11-041-2/+2
* vendorcode/eltan/security: Address layout issuesWim Vervoorn2019-11-041-17/+12
* smbios: Create a type for smbios_enclosure_typeMathew King2019-11-042-4/+4
* arch/x86/Kconfig: drop unused BOOTBLOCK_SAVE_BIST_AND_TIMESTAMPElyes HAOUAS2019-11-041-9/+0
* vendorcode/eltan/security: Use custom hash for little endian onlyWim Vervoorn2019-11-044-49/+21
* mb/facebook/fbg1701: Add logo to the menuWim Vervoorn2019-11-041-1/+6
* vendorcode/eltan: Cleanup Kconfig filesWim Vervoorn2019-11-042-4/+5
* soc/intel/icelake: Make use of "all-y"Subrata Banik2019-11-041-26/+7
* soc/intel/icelake: Add alignment check for TSEG base and sizeSubrata Banik2019-11-041-0/+7
* soc/intel/icelake: Set DCACHE_BSP_STACK_SIZE default ~129KiB unconditionallySubrata Banik2019-11-041-2/+1
* soc/intel/icelake: Remove unused headersSubrata Banik2019-11-043-3/+1
* soc/intel/icelake: Skip BIOS OpRom execution based on CONFIG_RUN_FSP_GOPSubrata Banik2019-11-041-2/+2
* soc/intel/icelake: Clean up report_cpu_info() functionSubrata Banik2019-11-041-7/+7
* cpu/x86/mtrr/xip_cache.c: Fix inconsistent messageAngel Pons2019-11-031-1/+1
* mb/intel/{i82801gx,x4x}: Don't select ASPM optionsArthur Heymans2019-11-035-15/+0
* arch/arm64: Pass cbmem_top to ramstage via calling argumentArthur Heymans2019-11-0311-12/+9
* arch/arm: Pass cbmem_top to ramstage via calling argumentArthur Heymans2019-11-0310-10/+8
* arch/x86: Use the stage argument to implement cbmem_topArthur Heymans2019-11-039-21/+18
* boot_state: Reduce precision of reported timesKyösti Mälkki2019-11-031-1/+7
* intel/quark: Switch to TSC_MONOTONIC_TIMERKyösti Mälkki2019-11-032-11/+1
* intel/broadwell: Switch to TSC_MONOTONIC_TIMERKyösti Mälkki2019-11-033-64/+1
* cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki2019-11-0332-54/+43
* nb/intel/gm45: Add VBOOT supportArthur Heymans2019-11-021-0/+4
* cpu/intel/core2: Cache XIP romstage with C_ENVIRONMENT_BOOTBLOCK.Arthur Heymans2019-11-022-0/+2
* cpu/x86: Add a prog_run hook to set up caching of XIP stagesArthur Heymans2019-11-023-0/+123
* soc/intel/skylake: set FSP param to enable or skip GOPMichael Niewöhner2019-11-021-0/+6
* timestamps: COLLECT_TIMESTAMPS is mostly optionalKyösti Mälkki2019-11-025-5/+0
* soc/intel/common/pch: move EBDA Kconfig to soc levelMichael Niewöhner2019-11-024-1/+3
* soc/intel/skylake: set LT_LOCK_MEMORY at end of POSTMichael Niewöhner2019-11-021-0/+4
* soc/intel: common,apl,skl: remove orphaned memory locking APIMichael Niewöhner2019-11-023-23/+0
* soc/intel/common: sgx: use cpu_lt_lock_memory in sgx setupMichael Niewöhner2019-11-021-2/+4
* soc/intel/skylake: select the new SGX Kconfig option for LT_LOCK_MEMORYMichael Niewöhner2019-11-021-0/+1
* soc/intel/common: sgx: add new Kconfig option for setting LT_LOCK_MEMORYMichael Niewöhner2019-11-021-0/+7
* soc/amd/stoneyridge: Remove UDELAY_LAPIC_FIXED_FSBKyösti Mälkki2019-11-021-4/+0
* cpu/x86: Move calibrate_tsc_with_pit() to drivers/pc80Kyösti Mälkki2019-11-024-78/+85
* mb/emulation/*-riscv: Initialize cbmem in romstageArthur Heymans2019-11-012-0/+5
* mb/facebook/fbg1701: Add public key to bootblock_verify_listWim Vervoorn2019-11-013-4/+7
* src/Kconfig: Drop unused HAVE_POSTCARElyes HAOUAS2019-11-011-5/+0
* console/kconfig: Move ONBOARD_VGA_IS_PRIMARY to 'devices'Arthur Heymans2019-11-012-7/+10
* mb/apple/macbook21: Use DEBUG_RAM_SETUPElyes HAOUAS2019-11-011-3/+2
* mb/facebook/fbg1701: Remove confusing text boxes from menuWim Vervoorn2019-11-011-2/+2
* mb/google/drallion: Add second touch pad supportEric Lai2019-11-011-0/+7
* mb/intel/saddlebrook: Enable Chipset_lockdown coreboot configPraveen Hodagatta Pranesh2019-11-011-0/+5
* mb/intel/saddlebrook: Select coreboot MP initPraveen Hodagatta Pranesh2019-11-011-1/+0
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