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* linking: add and use LDFLAGS_commonAaron Durbin2015-09-099-20/+23
* x86: link romstage and ramstage with 1 fileAaron Durbin2015-09-094-43/+70
* rmodule: use program.ld for linkingAaron Durbin2015-09-0914-125/+64
* verstage: use common program.ld for linkingAaron Durbin2015-09-0914-123/+28
* x86: link romstage like the other architecturesAaron Durbin2015-09-097-44/+34
* linking: move romstage and bootblock to use program.ldAaron Durbin2015-09-094-123/+8
* x86: link ramstage like the other architecturesAaron Durbin2015-09-092-21/+28
* linking: lay the groundwork for a unified linking approachAaron Durbin2015-09-097-66/+120
* x86: provide minimum alignment for romstageAaron Durbin2015-09-091-1/+7
* rules.h: add fall through where no ENV_<STAGE> is setAaron Durbin2015-09-091-1/+15
* drivers/pc80: Do not initialize PS2 keyboard by defaultAlexandru Gagniuc2015-09-091-1/+1
* intel/model_2065x/Kconfig: Don't use LAPIC_MONOTONIC_TIMERMartin Roth2015-09-091-1/+0
* x86: remove unused sections from romstage.ldAaron Durbin2015-09-091-3/+1
* x86: add romstage.S to bind program flow and orderingAaron Durbin2015-09-092-13/+50
* x86: don't create MAINBOARDDIR/romstage.inc for !ROMCC boardsAaron Durbin2015-09-091-14/+10
* x86: bootblock: remove linking and program flow from build systemAaron Durbin2015-09-0932-58/+155
* cpu: fix cpu_microcode classAaron Durbin2015-09-081-1/+0
* video_printf: align textDaisuke Nojiri2015-09-082-2/+33
* video: add video_printfDaisuke Nojiri2015-09-082-0/+26
* rk3288: Allow board-specific APLL (CPU clock) settingsDavid Hendricks2015-09-088-11/+22
* skylake: igd: clean up igd.cDuncan Laurie2015-09-081-15/+9
* braswell: Tristate CFIO 139 and CFIO 140Ravi Sarawadi2015-09-082-0/+8
* drivers/pc80/tpm: Set "Found TPM" message to BIOS_INFO levelDuncan Laurie2015-09-081-1/+1
* veyron: Unify identical mainboardsJulius Werner2015-09-08152-8504/+50
* kunimitsu: Modify DQ/DQS mappingMike M Hsieh2015-09-081-5/+5
* Skylake:Set DISB inside romstage after mrc initDhaval Sharma2015-09-082-2/+17
* skylake: Clean up chip.hDuncan Laurie2015-09-081-26/+7
* kunimitsu: Clean up devicetree.cbDuncan Laurie2015-09-081-103/+79
* glados: Clean up devicetree.cbDuncan Laurie2015-09-081-66/+72
* sklrvp: Clean up devicetree.cbDuncan Laurie2015-09-081-38/+21
* kunimitsu: Fix incorrect comment format in devicetree.cbDuncan Laurie2015-09-081-11/+11
* glados: Fix incorrect comment format in devicetree.cbDuncan Laurie2015-09-081-10/+10
* kunimitsu: Disable unused USB portsDuncan Laurie2015-09-081-0/+12
* glados: Disable unused USB portsDuncan Laurie2015-09-081-0/+12
* skylake: Apply USB2 and USB3 port enable/disable settingsDuncan Laurie2015-09-081-11/+9
* skylake: Remove dead codeLee Leahy2015-09-082-21/+0
* skylake: refactor flash_controller codeAaron Durbin2015-09-082-208/+158
* skylake: move flash_controller.h to the proper placeAaron Durbin2015-09-083-5/+5
* skylake: fix eventlog on resume pathAaron Durbin2015-09-081-0/+12
* skylake: allow timer_monotonic_get() in all stagesAaron Durbin2015-09-082-25/+3
* skylake: ACPI: Clean up GPIO controllerDuncan Laurie2015-09-081-37/+27
* skylake: ACPI: Clean up and fix XHCI ACPI DeviceDuncan Laurie2015-09-083-252/+165
* skylake: ACPI: Remove SerialIO ACPI mode codeDuncan Laurie2015-09-084-600/+20
* skylake: ACPI: Move storage controllers to separate fileDuncan Laurie2015-09-083-29/+127
* skylake: ACPI: Remove itss.asl and cleanup irqlinks.aslDuncan Laurie2015-09-083-297/+137
* skylake: iomap: Remove unused RCBA regionDuncan Laurie2015-09-081-5/+1
* skylake: PCR: Add Port ID for SCSDuncan Laurie2015-09-081-2/+3
* skylake: ACPI: Add functions for PCR accessDuncan Laurie2015-09-082-0/+77
* skylake: ACPI: Clean up pch.aslDuncan Laurie2015-09-085-30/+28
* skylake: ACPI: Fix and clean up PCIE _PRT entriesDuncan Laurie2015-09-083-88/+156
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