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* ifwitool: Do not calculate checksum for subpart_dirFurquan Shaikh2016-06-121-49/+6
* ifwitool: Correct pack order and header orderFurquan Shaikh2016-06-121-11/+15
* riscv-spike: Replace custom UART with a memory-mapped 8250Jonathan Neuschäfer2016-06-122-34/+2
* arch/riscv: Compile with -mcmodel=medanyJonathan Neuschäfer2016-06-121-1/+4
* arch/riscv: Add misc.c to bootblock/romstage to get udelay()Jonathan Neuschäfer2016-06-121-0/+2
* arch/riscv: copy read/write8/16/32 from x86Jonathan Neuschäfer2016-06-121-0/+30
* arch/riscv/trap_util.S: Use "li" pseudo-instruction to load a constantJonathan Neuschäfer2016-06-121-1/+1
* intel/apollolake: Use custom reset callsFurquan Shaikh2016-06-123-1/+56
* Documentation/Intel/Board: Update the Galileo checklistLee Leahy2016-06-121-4/+36
* autoport: Add prompt for enabling unsafe inteltool glx optionChris Ching2016-06-121-2/+43
* nb/intel: Factor out common MRC codePatrick Rudolph2016-06-126-92/+38
* rockchip: rk3399: pass board specific message to BL31Lin Huang2016-06-123-0/+57
* 3rdparty/arm-trusted-firmware: Update to Jun 8, 2016 masterMartin Roth2016-06-121-0/+0
* mt8173: dram: Add more sample points to improve dram timing marginPH Hsu2016-06-125-33/+36
* oak: Select VBOOT_EC_SLOW_UPDATE Kconfig optionJulius Werner2016-06-121-0/+1
* Kconfig: Set VBOOT_OPROM_MATTERS for relevant non-x86 devicesJulius Werner2016-06-127-2/+17
* rockchip: gru: Add USB DRD DWC3 controller supportLiangfeng Wu2016-06-126-0/+254
* libpayload: usb: xhci: Support rockchip xHCI controllerLiangfeng Wu2016-06-122-6/+15
* arch/x86: Support "weak" BIST and timestamp save routinesLee Leahy2016-06-112-3/+28
* mainboard/intel/galileo: Support bootblock in CLee Leahy2016-06-111-0/+3
* arch/x86: Add debug spinloops in assembly_entry.SLee Leahy2016-06-112-0/+25
* arch/x86: Add debug spinloopLee Leahy2016-06-112-0/+16
* Revert "soc/intel/apollolake: Do not use StackBase FSP-M parameter"Brandon Breitenstein2016-06-101-5/+1
* soc/intel/apollolake: FSP Header file update for FSP 139_40Brandon Breitenstein2016-06-103-8/+18
* util/checklist: Add bootblock supportLee Leahy2016-06-093-72/+14
* vendorcode/intel/fsp1_1/checklist: romstage - Add car_stage_entryLee Leahy2016-06-092-0/+2
* mainboard: Support ROM_SIZE > 16 MiBLee Leahy2016-06-092-1/+27
* soc/intel/apollolake: Update FSP header filesBora Guvendik2016-06-095-219/+445
* intel/amenia: Program EMMC dll settingZhao, Lijian2016-06-091-0/+5
* soc/intel/apollolake: Add EMMC DLL APIZhao, Lijian2016-06-092-0/+47
* skylake: Support common LPSS I2C driverDuncan Laurie2016-06-099-0/+193
* lib: Build reg_script for bootblockLee Leahy2016-06-091-0/+1
* arch/x86: Enable SSE in bootblock_crt0.SLee Leahy2016-06-091-6/+2
* lib: Add asmlinkage attribute to bootblock_main_with_timestampLee Leahy2016-06-092-2/+3
* skylake: Move I2C bus configuration to separate structureDuncan Laurie2016-06-096-12/+25
* skylake: gpio: Add support for setting 1.8V tolerantDuncan Laurie2016-06-097-19/+35
* skylake: Add function to set PRR for protecting flashDuncan Laurie2016-06-093-1/+51
* soc/intel/common: Add LPSS I2C driverDuncan Laurie2016-06-094-0/+438
* device: i2c: Add support for I2C bus operationsDuncan Laurie2016-06-093-0/+107
* soc/intel/quark: Pass serial port address to FSPLee Leahy2016-06-092-27/+34
* rockchip: rk3399: Add support i2sXing Zheng2016-06-084-2/+76
* gru: kevin: enable EC SPI interfaceVadim Bendebury2016-06-082-3/+6
* gru: kevin: configure board GPIOsVadim Bendebury2016-06-083-5/+25
* veyron: Add exception_init() to romstageJulius Werner2016-06-087-0/+7
* rk3399: add ability to configure SPI5Vadim Bendebury2016-06-081-1/+6
* gru: kevin: define GPIOs used on both platformsVadim Bendebury2016-06-082-0/+32
* inteltool: handle unsafe dumping of graphics registersStefan Tauner2016-06-082-4/+4
* drivers/intel/fsp2.0: Add semantic patch for FspUpdVpd.h headerAlexandru Gagniuc2016-06-082-0/+220
* soc/apollolake: Add SOC specific c-state tableHannah Williams2016-06-083-0/+44
* soc/intel/common: Add common code for acpi c/p/t-state entriesHannah Williams2016-06-084-0/+368
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