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* MAINTAINERS: Add entry for mb/ocp/tiogapassJonathan Zhang2020-05-111-0/+10
| | | | | | | | | | | | | | Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: Ia48f20ca8c21d3c645c5566c189dddf2f8bc0308 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40966 Reviewed-by: Anjaneya "Reddy" Chagam <anjaneya.chagam@intel.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Bryant Ou <bryant.ou.q@gmail.com> Reviewed-by: Johnny Lin Reviewed-by: Morgan Jang Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Update GA-H61M-S2PVAngel Pons2020-04-161-2/+2
| | | | | | | | | | | | Commit 991ee05 ("mb/gigabyte/ga-h61m-s2pv: rename to ga-h61m-series") renamed the mainboard folder from `ga-h61m-s2pv` to `ga-h61m-series`, but the MAINTAINERS file was not updated accordingly. Correct that. Change-Id: I8119e29912e04ab57bebb96f37a4147afbb4d56e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* MAINTAINERS: Drop invalid pathsAngel Pons2020-04-161-11/+0
| | | | | | | | | | Remove references to directories that no longer exist. Change-Id: Ief45bf4c00c6cbf9b5acef72a76c05a86a7ebedc Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* MAINTAINERS: Fix a commentAngel Pons2020-04-151-1/+1
| | | | | | | | | | | A space was missing before the asterisks. Change-Id: I1cb62a9efc8e15c09cdebb49956f0edeb032beb3 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40410 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* Remove myself from MAINTAINERS filePhilipp Deppenwiese2020-04-011-7/+6
| | | | | | | | | | | I will pass my responsibilities to Christian Walter. I have hardly any time left for the coreboot project. Change-Id: Ia60e71c5cbd361486dbc924ad954db203e285a5a Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39897 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* mb/libretrend/lt1000: Add Libretrend LT1000 mainboardMichał Żygowski2020-03-101-0/+6
| | | | | | | | | Change-Id: I32fc8a7d3177ba379d04ad8b87adefcfca2b0fab Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30360 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
* MAINTAINERS: Add 3mdeb as Protectli mainboards maintainersMichał Żygowski2020-03-101-0/+6
| | | | | | | | Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I03301441bb07e64aeb59e659ab1b22442b73ca1c Reviewed-on: https://review.coreboot.org/c/coreboot/+/39418 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* commonlib: Add commonlib/bsdJulius Werner2020-01-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch creates a new commonlib/bsd subdirectory with a similar purpose to the existing commonlib, with the difference that all files under this subdirectory shall be licensed under the BSD-3-Clause license (or compatible permissive license). The goal is to allow more code to be shared with libpayload in the future. Initially, I'm going to move a few files there that have already been BSD-licensed in the existing commonlib. I am also exracting most contents of the often-needed <commonlib/helpers.h> as long as they have either been written by me (and are hereby relicensed) or have an existing equivalent in BSD-licensed libpayload code. I am also relicensing <commonlib/compression.h> (written by me) and <commonlib/compiler.h> (same stuff exists in libpayload). Finally, I am extracting the cb_err error code definitions from <types.h> into a new BSD-licensed header so that future commonlib/bsd code can build upon a common set of error values. I am making the assumption here that the enum constants and the half-sentence fragments of documentation next to them by themselves do not meet the threshold of copyrightability. Change-Id: I316cea70930f131e8e93d4218542ddb5ae4b63a2 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38420 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* MAINTAINERS: Add myself as a maintainer for Lenovo G505S and ASUS AM1I-AMike Banon2020-01-021-0/+10
| | | | | | | | | | | These are the boards I have and currently working on. Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: I3f366105371c7d2568da6682b24cb52bce2d5467 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38026 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* src: Add Facebook Monolith to maintainersWim Vervoorn2019-12-061-0/+6
| | | | | | | | | | | | | Add Facebook Monolith maintainers. BUG=N/A TEST=build Change-Id: I4e7f44710deada0331ac9b4e77d6144848faf6cb Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37517 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
* MAINTAINERS: Remove FSP1.0 and boards using itArthur Heymans2019-11-221-52/+0
| | | | | | | | | | | Change-Id: I0c6c36c7a425e8aeae272f5747ce2bdbb7caceaf Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37107 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Remove unsupported AMD platformsArthur Heymans2019-11-211-34/+0
| | | | | | | | | | Change-Id: I3f8164577052298de2392e90375e132022713a6d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36993 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* MAINTAINERS: Remove unsupported VIA platformArthur Heymans2019-11-201-5/+0
| | | | | | | | | Change-Id: I2965de2318cdc160ef5ab56f7f52a76775c1e200 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36989 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Remove MIPS architectureJulius Werner2019-11-201-6/+0
| | | | | | | | | | | | | | | | | The MIPS architecture port has been added 5+ years ago in order to support a Chrome OS project that ended up going nowhere. No other board has used it since and nobody is still willing or has the expertise and hardware to maintain it. We have decided that it has become too much of a mainenance burden and the chance of anyone ever reviving it seems too slim at this point. This patch eliminates all MIPS code and MIPS-specific hacks. Change-Id: I5e49451cd055bbab0a15dcae5f53e0172e6e2ebe Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34919 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Add supermicro/x11-lga1151-seriesMichael Niewöhner2019-10-171-0/+5
| | | | | | | | | | | | | Add an entry for mb/supermicro/x11-lga1151-series and add myself to the list of maintainers. Change-Id: I634d251b4323c4f05edd553a9fa82e0f8c53773b Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* MAINTAINERS: Step down as RISC-V maintainerJonathan Neuschäfer2019-08-051-1/+0
| | | | | | | | | | | | | | I haven't been active in coreboot, and coreboot-on-RISC-V in particular, for quite a while, so let's update the MAINTAINERS file accordingly. Change-Id: Ib65da0659ada94deed8756498a6948d1d1352ed0 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33619 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: ron minnich <rminnich@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Add Portwell M107 maintainersFrans Hendriks2019-07-211-0/+6
| | | | | | | | | | | | | Add maintainers to Portwell PQ-M107 boards. BUG=N/A TEST=N/A Change-Id: I9171a9dd56bba7cc4836a7d2c2e314b910229cb9 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34445 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* MAINTAINERS: Add arbitration board members for the code of conductPatrick Georgi2019-07-191-0/+8
| | | | | | | | | | | | | | Since they're in charge of enforcing it, they should also get to see when somebody attempts to change it. Change-Id: I8c12dd0c27f7c3661e9755a5181db08563c8561f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34393 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* MAINTAINERS: Add myself as a maintainer for apple boardsEvgeny Zinoviev2019-06-281-0/+5
| | | | | | | | Change-Id: I33bf45c81cc4be157ea71806900a545ee68ecee8 Signed-off-by: Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33148 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* mainboard: Add support for ASUS P8Z77-M PRO desktop mainboardVlado Cibic2019-06-271-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for ASUS P8Z77-M PRO desktop mainboard Working: - Tianocore and SeaBIOS boot - PS/2 keyboard and mouse - Audio - S3 Suspend, shutdown and reboot - USB2 / USB3 - Gigabit Ethernet - SATA3, SATA2 and eSATA - NVME - CPU Temp sensors - TPM - Native raminit and also MRC - PCIe GPU in all PCIe slots (16x/8x/4x) (linux) - Integrated graphics with both libgfxinit and Intel Video OpROM (all connectors VGA/DVI-D/HDMI) Signed-off-by: Vlado Cibic <vladocb@protonmail.com> Change-Id: I47d24ac8b236f929c3160f9a769b971d83710f9d Reviewed-on: https://review.coreboot.org/c/coreboot/+/33328 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Add maintainers to ELTAN VENDORCODEFrans Hendriks2019-06-181-0/+6
| | | | | | | | | | Add maintainers to the new vendorcode. Change-Id: Ie3f99dd99c708f93bfcd19f52c57504e157e1eca Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33441 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* MAINTAINERS: Add maintainer to Facebook FBG1701Frans Hendriks2019-06-051-0/+6
| | | | | | | | | | Add maintainers to the new mainboard port. Change-Id: I620ea424cc26fa0218a74052863ea30700789e1b Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33224 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
* MAINTAINERS: Update Braswell SoC maintainersMichał Żygowski2019-03-061-2/+4
| | | | | | | | | | | | | | | | | Remove former Intel employee from maintainers of Braswell SoC. Add 3mdeb and Eltan representatives as Braswell SoC maintainers. Also mark Braswell SoC as maintained. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Id815db60e3718bf141abcc7923ea073bbab4a516 Reviewed-on: https://review.coreboot.org/c/coreboot/+/31673 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
* MAINTAINERS: Tag denverton-ns as Odd FixesNico Huber2019-01-091-4/+1
| | | | | | | | | | | And remove some maintainers that aren't even registered to Gerrit. Change-Id: I3a753b60eab6d7939c37181760bcfb4bc6e75f65 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/29472 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Guckian Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mainboard: Add Supermicro X10SLM+-FTristan Corrick2018-12-291-0/+5
| | | | | | | | | | | | | | | | This board runs well with coreboot. The documentation part of this commit lists what works and what doesn't. Tested with GRUB 2.02 as a payload, loading SeaBIOS 1.12.0 which then boots FreeBSD 11.2. It has also been tested with GRUB directly booting Debian GNU/Linux 9.6 (kernel 4.9). Change-Id: I291573d4651bdffe24eb841033ea6189fcbf8502 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30357 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* MAINTAINERS: Add myself as a maintainer for boards I've portedTristan Corrick2018-12-061-0/+15
| | | | | | | | | Change-Id: I41363685bb5c84ce15698f96e58f6a5da9bd2ba2 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30075 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* MAINTAINERS: Add myself as some mainboards' maintainerAngel Pons2018-12-031-0/+20
| | | | | | | | | | | | | Add myself as a maintainer of the four mainboards I ported. For those which were added as a variant, add myself as a maintainer of the whole mainboard group. Change-Id: I0e1b54279027fae82ea9f2825e6f27d38ef3c746 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/29995 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* MAINTAINERS: Add Philipp Hug as reviewer for RISC-VJonathan Neuschäfer2018-12-031-0/+1
| | | | | | | | | | | Philipp has been reviewing and writing RISC-V-related code for a while. Change-Id: I3f2d3a61f66343a6e0350909edfe466d2ee6c089 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29980 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Philipp Hug <philipp@hug.cx>
* arch/power8: Rename to ppc64Jonathan Neuschäfer2018-11-301-2/+2
| | | | | | | | | | | | | | | POWER8 is a specific implementation of ppc64, which is by now outdated (POWER9 has been on the market for a while). Rename arch/power8/ to potentially cover a wider range of hardware. TEST=Toolchains built before/after this commit can build coreboot for emulation/qemu-power8 from before/after this commit. Change-Id: I2d6f08b12a9ffc8a652ddcd6f24ad85ecb33ca52 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
* broadcom: Remove SoC and board supportPhilipp Deppenwiese2018-11-301-2/+0
| | | | | | | | | | | | | | | | | | The reason for this code cleanup is the legacy Google Purin board which isn't available anymore and AFAIK never made it into the stores. * Remove broadcom cygnus SoC support * Remove /util/broadcom tool * Remove Google Purin mainboard * Remove MAINTAINERS entries Change-Id: I148dd7eb0192d396cb69bc26c4062f88a764771a Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/c/29905 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Add myself as a maintainerMatt DeVillier2018-11-301-0/+25
| | | | | | | | | | | | | Add myself as a maintainer for legacy Intel-based ChromeOS devices for which I provide coreboot images as a comminuty member, and as a maintainer for Purism devices in a professional capacity. Change-Id: I70df3b9e4e36c2e5d73f8888fe0ec220aa8a91b7 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/29913 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* MAINTAINERS: Update 9eSec maintainersPhilipp Deppenwiese2018-11-271-4/+28
| | | | | | | | | | Update 9elements Cyber Security maintainers. Change-Id: Ib683cb1b6a338667b065a71b05bdd3a4294e0296 Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/c/29820 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Drop "the rest" componentPatrick Georgi2018-11-241-7/+0
| | | | | | | | | | | | | The semantics in util/scripts/maintainers.go have changed in that a file can be part of multiple components. This means that all files are part of "the rest" now, which doesn't make much sense. Change-Id: I220afe27e78aa5358fca61851242812f2d763992 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/29657 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Add maintainer for all Siemens mc_xxxx mainboardsWerner Zeh2018-11-231-0/+7
| | | | | | | | | Change-Id: If8f662d088bf57fd27c5a01a47bc094dcb53a4de Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/29806 Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Add myself as maintainer for the getac/p470Patrick Georgi2018-11-231-0/+5
| | | | | | | | Change-Id: Iae87a2e6f223f1d6e39034be4c8b511187eca6f5 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/c/29782 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* northbridge/intel/fsp_*: Remove legacy SoCszaolin2018-11-191-12/+0
| | | | | | | | | | | | | | | * Remove FSP Sandy/Ivybrige which are unused. * Open Source implementation isn't final but good enough to replace FSP version. * For new ports use NORTHBRIDGE_INTEL_IVYBRIDGE and NORTHBRIDGE_INTEL_SANDYBRIDGE Change-Id: I7b6bc4bfdd0481c8fe5b2b3d8f8b2eb9aa3c3b9e Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/29402 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* MAINTAINERS: Clarify this is about active upstream developmentNico Huber2018-11-141-3/+17
| | | | | | | | | | | | | | | | | | | | | | <vendor> seems to be confused about the meaning of our maintainers list. I get the feeling some use it to organize corporate internal teams and branches, adding names to the list that don't show up in Gerrit and even if, often don't react to reviewing requests (within months). Maybe they even don't know that this is about coreboot.org? To clarify this: o Add an introductory paragraph mentioning development on coreboot.org. o Explicitly state that maintainers should be registered to Gerrit. o If a topic is tagged as `Supported` or `Maintained`, expect that somebody reacts to review requests. Change-Id: I9ee038dc5ee1f4993ba1d230ef6e737f20e2ff8a Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/29471 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Guckian
* MAINTAINERS: Update RISC-V entry with SiFive and utilsJonathan Neuschäfer2018-10-041-0/+3
| | | | | | | | | | Change-Id: Idd9e51fe2cb7a8497381f5b7440666cd709166b8 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28757 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Hug <philipp@hug.cx> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* mb/lowrisc: Remove the Nexys4DDR portJonathan Neuschäfer2018-09-261-2/+0
| | | | | | | | | | | | | | | This board doesn't support the newest RISC-V Privileged Architecture spec (1.10), and it's based on an FPGA so it's a moving target. Now that there's actual RISC-V silicon out there (from SiFive), mb/lowrisc/nexys4ddr will only continue to bitrot. Change-Id: I4e3e715106a1a94381a563dc4a56781c35883c2d Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28706 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Hug <philipp@hug.cx> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
* util/ifdfake: Remove deprecated utilityAngel Pons2018-08-231-1/+0
| | | | | | | | | | | | | | Since ifdfake has been deprecated in favor of better alternatives, there is no need to support it any further. Remove it from "util/", as well as any leftover references in other files. Change-Id: I45fe3d9fd606a61d5c3b9d0e6489a1df6d6510f0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28234 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* MAINTAINERS: change second PC Engines maintainerPiotr Król2018-03-211-1/+1
| | | | | | | | | Change-Id: I5eac0ae55e759ac9eb26783c11057db15fa62574 Signed-off-by: Piotr Król <piotr.krol@3mdeb.com> Reviewed-on: https://review.coreboot.org/25254 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
* MAINTAINERS: Update INTEL FSP DENVERTON-NS SOC & HARCUVAR CRB MaintainersVanessa Eusebio2018-02-261-1/+3
| | | | | | | | | | | | * Add David, Jeff, and Shine * Remove Fei Change-Id: I2803af80ac8c2b1d04ecd125c0cb123e736cdf7e Signed-off-by: Vanessa Eusebio <vanessa.f.eusebio@intel.com> Reviewed-on: https://review.coreboot.org/23847 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mariusz Szafranski Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* MAINTAINERS: add maintainers for all PC Engines mainboardsPiotr Król2017-10-311-0/+6
| | | | | | | | | | | Change-Id: Ic5855257900fe6e1e8dd3551f1427a4fe51924b1 Signed-off-by: Piotr Król <piotr.krol@3mdeb.com> Reviewed-on: https://review.coreboot.org/21732 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kamil Wcisło <kamil.wcislo@3mdeb.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
* MAINTAINERS: Remove extra unnecessary spaceSumeet Pawnikar2017-09-151-2/+2
| | | | | | | | | | | | Remove extra unnecessary space at end of line. Change-Id: I27688c3b8df71b875f1dc1020465d838756362be Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/21521 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* MAINTAINERS: Add Julius as LZ4 maintainerJulius Werner2017-09-151-0/+7
| | | | | | | | | | | | I imported the LZ4 compression code and want to keep an eye on it to ensure that our sources stay in sync with upstream. Change-Id: I249ce24f6630d66d451d993198cd267478e5743e Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/21488 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
* MAINTAINERS: Add INTEL FSP DENVERTON-NS SOC & HARCUVAR CRBMariusz Szafranski2017-09-151-0/+9
| | | | | | | | | | | | Add Intel FSP Atom C3000 SoC ("Denverton" and "Denverton-NS") and Harcuvar CRB to the list. Change-Id: I1c4bfd0900e8d425b95b5ef6c541b1e988846667 Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com> Reviewed-on: https://review.coreboot.org/21515 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
* MAINTAINERS: Update support listMartin Roth2017-07-151-18/+46
| | | | | | | | | | | | | | | | | | | | I sent out an email to all of the maintainers asking to verify their status. - The email I sent to Marcin Wojciechowski bounced, so I'm removing the Little Plains mainboard support. - I'm removing myself from areas that I'm not currently maintaining. - Due to Damien's schedule, he asked that the level for his pieces be changed from "Maintained" to "Odd Fixes". I've added a list of infrastructure owners and backup owners - This is strictly informational. Change-Id: I39715611e8025bb535cdf1012be2bf05bf91fdaa Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Damien Zammit <damien@zamaudio.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
* MAINTAINERS: Update maintainer address (APLK and FSP 2.0)Andrey Petrov2017-07-131-5/+4
| | | | | | | | | | | | | Update my email address for Apollolake and FSP 2.0 driver. Also downgrade support from "supported" to "maintained" as currently no other Intel persons are assigned for the role. Change-Id: I3033fc5ec8b0882ce79eeb15ee3eb13a228611a4 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/20550 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* MAINTAINERS: Add Julius as ARM architecture maintainerJulius Werner2017-06-121-8/+17
| | | | | | | | | | | | | | | | | I'm pretty much already doing this anyway, so I might as well document it. Separating out some older ARM SoCs that were added by other people and are pretty much orphaned now. I can also fill out the MISSING: MEMLAYOUT point (since I wrote that). Change-Id: I8b78d592a1ed68a42e5785ebdc13df2edf9007bf Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/20137 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
* Use www.coreboot.org over coreboot.orgPaul Menzel2017-06-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <https://coreboot.org> is redirected to <https://www.coreboot.org>. ``` $ curl -I https://coreboot.org HTTP/1.1 301 Moved Permanently Server: nginx/1.8.1 Date: Mon, 05 Jun 2017 10:41:33 GMT Content-Type: text/html Content-Length: 184 Connection: keep-alive Location: https://www.coreboot.org/ ``` So use the command below to use the final location to save a redirect. ``` $ git grep -l https://coreboot.org \ | xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g' ``` Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/20035 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-23 06:43:04 +0000