summaryrefslogtreecommitdiffstats
path: root/payloads
Commit message (Collapse)AuthorAgeFilesLines
* tint: update the archive from 0.04+nmu1 to 0.05Mike Banon2021-02-071-3/+3
| | | | | | | | | | | | Old archive is not available anymore. The tint sources inside the new archive are the same (something changed in a debian subdirectory but we aren't using it), so a libpayload_tint.patch is still valid. Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: If556fac7d1d8379a022f59ed6aee1450b7bc5aa7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48616 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* payloads: Force sub-make runs for in-tree payloadsNico Huber2021-02-071-3/+6
| | | | | | | | | | | | | | | | The sub-process calls break make's dependency tracking, hence we have to always perform the calls if we want to allow automatic, incremental builds. We let each rule depend on a new, phony target `force-payload`. It has roughly the same effect as tagging all the targets as phony, but doing so would feel wrong as some of them are actual files. Change-Id: I1bc2406db371e8dddbfdf71f68a6665a5b558f5e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47638 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* payloads: Pass $(CCACHE) on to in-tree payloadsNico Huber2021-02-071-0/+2
| | | | | | | | Change-Id: Ie15aec4059fbeb99f714c3d674df5fabdb7c081c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47637 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* nvramcui: Use libpayload's new `Makefile.payload`Nico Huber2021-02-073-33/+10
| | | | | | | | Change-Id: I34bf659c1a069ccc27ca613bbf86780d4da49259 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47636 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* coreinfo: Use libpayload's new `Makefile.payload`Nico Huber2021-02-072-90/+35
| | | | | | | | Change-Id: I388d60e6f3aeb2184966152f0934845d42834de0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47634 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload: Add a Makefile for in-tree payloadsNico Huber2021-02-071-0/+157
| | | | | | | | | | | | | | | | | | | | The new `Makefile.payload` can be included by the Makefiles of pay- loads for in-tree builds. The basic idea is to use libpayload's build results without the `make install` step, and to ensure that incremental builds work. For instance, if libpayload's code changes, a `make` for the payload would automatically update the libpayload build and rebuild the payload. But if there are no code changes in libpayload, only updated files of the payload will be re-built. The configuration of libpayload is supposed to be automatically generated from a `defconfig` file. If this `defconfig` changes, libpayload and the payload will be re-built. Change-Id: If5319f1bf0bcd09964416237c5cf7f8e59f487a2 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47633 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* nvramcui: Unexport COREBOOT_EXPORTSNico Huber2021-02-071-0/+2
| | | | | | | | | | | | | coreboot's Makefile exports a lot of variables that influence make sub- processes (e.g. for Kconfig). We don't want these variables leak into sub-processes for (lib)payload builds, hence unexport them. Change-Id: I8da2d8db6238d456723b9c22bee80c62e97027b0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48940 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* coreinfo: Unexport COREBOOT_EXPORTSNico Huber2021-02-071-0/+2
| | | | | | | | | | | | coreboot's Makefile exports a lot of variables that influence make sub- processes (e.g. for Kconfig). We don't want these variables leak into sub-processes for (lib)payload builds, hence unexport them. Change-Id: I7d65c0aa6d4550bd6600c437e838339af69496da Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48939 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* payloads/external/FILO: Pass Libpayloads path on the clean targetArthur Heymans2021-02-061-1/+1
| | | | | | | | | | | FILO's Makefile will check for libpayload and might not even `clean` if it's not found. Change-Id: If5f8f4ecce317e54cd4b5688553cc38220f6e6df Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36461 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* payloads/libpayload/arch/arm64/mmu.c: Fix typo in commentElyes HAOUAS2021-02-051-1/+1
| | | | | | | | Change-Id: Ieb10a881ef1d983f11318f0f6934491fd19fd0bf Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50268 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* treewide [Kconfig]: Remove useless commentElyes HAOUAS2021-02-024-4/+4
| | | | | | | | Change-Id: I3dafffa61f4fe6089fd11ef6579626aff8088df5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50185 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/arm*: Add 64bit memory access primitivesPatrick Georgi2021-01-302-0/+26
| | | | | | | | | | | | Add read64 and write64 for consistency with x86. BUG=b:178785769 Change-Id: I342e3a23201d0b804ea5ecfe47ee3e4bb516de4c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50115 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* build system: Always add coreboot.pre dependency to intermediatesPatrick Georgi2021-01-151-3/+3
| | | | | | | | | | | They all operate on that file, so just add it globally. Change-Id: I953975a4078d0f4a5ec0b6248f0dcedada69afb2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
* build system: Structure and serialize INTERMEDIATEPatrick Georgi2021-01-141-9/+3
| | | | | | | | | | | | | | | | | | | | | | | Target added to INTERMEDIATE all operate on coreboot.pre, each modifying the file in some way. When running them in parallel, coreboot.pre can be read from and written to in parallel which can corrupt the result. Add a function to create those rules that also adds existing INTERMEDIATE targets to enforce an order (as established by evaluation order of Makefile.inc files). While at it, also add the addition to the PHONY target so we don't forget it. BUG=chromium:1154313, b:174585424 TEST=Built a configuration with SeaBIOS + SeaBIOS config files (ps2 timeout and sercon) and saw that they were executed. Change-Id: Ia5803806e6c33083dfe5dec8904a65c46436e756 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49358 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* nvramcui: Make local render_form() function staticNico Huber2021-01-131-1/+1
| | | | | | | | | | | Allows us to build with `-Wmissing-prototypes`. Change-Id: I722b41e515ee472697028a912b9136ce59611051 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47635 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload/lpgcc: Drop redundant linker pathNico Huber2021-01-111-1/+1
| | | | | | | | | | It either doesn't exist (in-tree builds) or is the same as $_LIBDIR. Change-Id: I9551cbfc3295d86c22a3785be7cdc0f65eeb08c4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47632 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload/lpgcc: Set proper include paths for in-tree buildsNico Huber2021-01-111-6/+11
| | | | | | | | | | | | We only need `$_OBJ` in the include path for in-tree builds. Also, curses only need special handling for those and PDCurses turned out to need many more include paths. Change-Id: Idd29ef33065033e26ba61b09d412d8ca3566d643 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47631 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/lpgcc: Add more variables to support in-tree buildsNico Huber2021-01-111-6/+12
| | | | | | | | | | | Add $_DOTCONFIG and $_XCOMPILE pointing to the respective files and use them. Change-Id: I719b42d1c8abf055948daf5b000daa30cd249edd Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47630 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* payloads/external: Update cbfs-ints with CONFIG_UPDATE_IMAGEArthur Heymans2021-01-081-2/+3
| | | | | | | | Change-Id: Icfbfff3ba680a85eb2f683867064b19f40b9d40f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48898 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* */Makefile.inc: Add some INTERMEDIATE targets to .PHONYArthur Heymans2021-01-081-0/+3
| | | | | | | | | Change-Id: I125e40204f3a9602ee5810d341ef40f9f50d045b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48897 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload/lpgcc: Check for `libpayload.config` for in-tree buildsNico Huber2021-01-011-1/+1
| | | | | | | | | | | | | Instead of checking for an already fully build `libpayload.a`, we check for the `libpayload.config` which is the actual prerequisite to start using `lpgcc`. This will allow compilation of payload sources before or in parallel with the build of `libpayload.a`. Change-Id: Ic0143fefe33560af8b013ae48bbbe231b3ad46f3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* libpayload/lpgcc: Turn references to build dir into a variableNico Huber2021-01-012-5/+9
| | | | | | | | | | | | Introduce a `$_OBJ` variable, that points to the build directory for in-tree usage of `lpgcc`. If unset, the default `../build` relative to the location of `lpgcc` is used. Change-Id: I35112d7533d69aa51252dd2bceec010a62522403 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47629 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload: Keep a copy of .config in the build dirNico Huber2021-01-011-1/+4
| | | | | | | | | | | | This should make it easier to find the correct config for in-tree builds. Change-Id: I08d396ae3cedc65f63c4b8865701ea123c7d56cb Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47628 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload: Move .xcompile into $(obj)Nico Huber2021-01-013-8/+17
| | | | | | | | | | | | | | | Keep libpayload's xcompile in its build dir. While we are at it, align things with the top-level version. Having `.xcompile` in a central place led to race conditions when multiple payloads try to build their own libpayloads in parallel. Change-Id: I504e1862db79b368289867f7568c9169f27a1549 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* payloads/tianocore: Clean up build stringMatt DeVillier2020-12-301-2/+4
| | | | | | | | | | | | | | Extract the architecture (-a) and package (-p) options into a new variable (ARCH) to simplify the construction of BUILD_STR. Test: build/boot various boards w/Tianocore payload Change-Id: I490d48428ac56d613d0b704700dfcf4ebfb2d245 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48942 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* payloads/tianocore: Add Kconfig to set boot timeoutMatt DeVillier2020-12-283-2/+13
| | | | | | | | | | | | | | | | | | | Add a Kconfig option to set the tianocore boot timeout, which is passed to the payload via a command line parameter. Allows boards without an internal display (eg) to set a longer boot timeout, in order to ensure the boot splash/menu prompt are visible upon boot. The associated changes on the tianocore side have already been merged into MrChromebox's CorebootPayloadPkg and UefiPayloadPkg branches (coreboot_fb and uefipayloadpkg respectively). Change-Id: Ifeaadff05f6667d642c05b81f53c1d2dbc450af6 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* libpayload/i8042: Add API to peek on keyboard input queueNico Huber2020-12-242-0/+22
| | | | | | | | Change-Id: I60699e044b5bacd3f5292fed7edbf529ae133284 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47592 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload/keyboard: Add debug output to all state transitionsNico Huber2020-12-241-2/+31
| | | | | | | | Change-Id: I643a821d4c41fc068f2bab0bd571b0a4a359f59a Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47591 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/keyboard: Hide console output by defaultNico Huber2020-12-241-9/+15
| | | | | | | | Change-Id: I855d975a4729da34a6fa73a63dbbd12c856bdc00 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47590 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/keyboard: Implement self-testNico Huber2020-12-241-2/+47
| | | | | | | | | | | | | | | | | | | | The keyboard self-test is required for some devices. At least one device (integrated keyboard in a ThinkPad X201) actually starts the test automatically leading to spurious output and no response for the first seconds. We wait up to 5s for the self-test result. On failure or timeout, the command will be repeated until the 30s init timer runs out. This happens all in the background of the UI polling loop. To not unnecessarily delay the boot process, we first try an oppor- tunistic initialization which skips the self-test. Change-Id: Ie07b31e74d06e116ac81e76309621eed39a19b49 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47088 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/keyboard: Add timestamp to track time spent in a stateNico Huber2020-12-241-2/+5
| | | | | | | | | | Will be used to time out in states that don't always advance. Change-Id: I28235e7638d8157cedf81fd915a41d28a1fc070b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47087 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload/keyboard: Turn init sequence into a state machineNico Huber2020-12-241-38/+138
| | | | | | | | | | | | | | | | | We'll process the init sequence as part of the polling loop. This should have several advantages: * It eases error handling, i.e. we can return to an earlier state. * We don't have to stall initialization when a keyboard takes a little longer. * Generally, these keyboards can be hot-plugged (albeit not by design). Change-Id: I9cf5cf31eb420b3994bec20e56a72d37f3d2996e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/keyboard: Avoid races around input drainingNico Huber2020-12-241-4/+5
| | | | | | | | | | | | Draining the keyboard's buffer is only possible when the keyboard port is enabled. We should also disable input scanning before, as the buffer could be filled again with new keystrokes otherwise. Change-Id: Ibac9c0d04880ff4a3efda5ac53da2f9731f6602c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47085 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/keyboard: Introduce keyboard_drain_input()Nico Huber2020-12-241-8/+9
| | | | | | | | | | | | | Move the input-buffer draining into a function. It uses the low-level i8042 API directly to avoid conflicts with changes in the high-level keyboard API. Change-Id: I9427c5b8be4d59c2ee3da12d6168d34590043682 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47084 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload/keyboard: Revise keyboard_cmd() error handlingNico Huber2020-12-241-1/+26
| | | | | | | | | | | | | | | | | | | | | | Even if we are careful, it's still possible that we read spurious data from the keyboard, e.g. keystrokes. Namely, when we send the reset/disable command, there is a race before the command is pro- cessed. So we should always process data from the keyboard in a loop. We break it, when an ACK (0xfa) or a NAK (0xfe) is received, and warn on unexpected data unless it might be due to the mentioned race. This also gives us the opportunity to use command-specific timeouts which we take from Linux: 1s for the keyboard self-test (as there are keyboards that perform the test before acking the command) and 200ms for all other commands. Change-Id: I60a2643a8ff4b9231c63bf970c8749c97c7d8926 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47083 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/keyboard: Revise scancode set and translation configNico Huber2020-12-233-53/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some background first: The original XT keyboards used what we call scancode set #1 today. The PC/AT keyboards introduced scancode set #2, but for compatibility, its controller translated scancodes back to set #1 by default. Newer keyboards (maybe all we have to deal with) also support switching the scancode set. This means the translation option in the controller and the scancode set selection in the keyboard have to match. In libpayload, we only support set #1 scancodes. So we either need the controller's trans- lation on and set #2 selected in the keyboard, or the controller's translation off and set #1 selected in the keyboard. Valid configurations: * SET #1 + XLATE off * SET #2 + XLATE on Both with and without the PC_KEYBOARD_AT_TRANSLATED option, we were only configuring one of the two settings, leaving room for invalid configurations. With this change, we try to select scancode set #2 first, which seems to be the most supported one, and configure the controller's translation accordingly. We try to fall back to set #1 on failure. We also keep translation disabled during configuration steps to ensure that the controller doesn't accidentally translate confi- guration data. On the coreboot side, we leave the controller's translation at its default setting, unless DRIVERS_PS2_KEYBOARD is enabled. The latter enables the translation unconditionally. For QEMU this means that the option effectively toggles the translation, as QEMU's controller has it disabled by default. This probably made a lot of earlier testing inconsistent. Fixes: commit a95a6bf646 (libpayload/drivers/i8402/kbd: Fix qemu) The reset introduced there effectively reverted the scancode selection made before (because 2 is the default). It's unclear if later changes to the code were only necessary to work around it. Change-Id: Iad85af516a7b9f9c0269ff9652ed15ee81700057 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46724 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/i8042: Add API to get/set kbd translation stateNico Huber2020-12-232-0/+55
| | | | | | | | Change-Id: I49aa1c244cb60ea290df102f06f641c765f59fa5 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* coreboot tables: Add SPI flash memory map windows to coreboot tablesFurquan Shaikh2020-12-083-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | This change adds details about the memory map windows to translate addresses between SPI flash space and host address space to coreboot tables. This is useful for payloads to setup the translation using the decode windows already known to coreboot. Until now, there was a single decode window at the top of 4G used by all x86 platforms. However, going forward, platforms might support more decode windows and hence in order to avoid duplication in payloads this information is filled in coreboot tables. `lb_spi_flash()` is updated to fill in the details about these windows by making a call to `spi_flash_get_mmap_windows()` which is implemented by the driver providing the boot media mapping device. BUG=b:171534504 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload: Provide API to expose MMU memery ranges for ARM64Meng-Huan Yu2020-12-052-0/+13
| | | | | | | | | | | | | | | | | | Provide get_mmu_ranges() for ARM64 to let payloads could get MMU ranges for all used memory regions. BUG=b:171858277 TEST=Build in x86, arm, arm64. emerge-zork libpayload depthcharge emerge-nyan libpayload depthcharge emerge-asurada libpayload depthcharge Signed-off-by: Meng-Huan Yu <menghuan@google.com> Change-Id: I39b24aefc9dbe530169b272e839d0e1e7c697742 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
* libpayload/usb: Add format string checking to usb_debugCaveh Jalali2020-11-221-1/+1
| | | | | | | | | | | | | | This turns on the compiler's printf style format string checker. BUG=b:167517417 TEST=enabled all USB controllers on volteer and fixed resulting compiler errors when USB_DEBUG is enabled. Change-Id: Ic94ebcbafdde8a5f79278b5635111b99af40f892 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45025 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload/usb: Fix printf format string mismatches in debug messagesCaveh Jalali2020-11-225-27/+33
| | | | | | | | | | | | | | | This fixes format string mismatch errors in the USB subsystem found by the compiler's format string checker. BUG=b:167517417 TEST=enabled all USB controllers on volteer and fixed resulting compiler errors when USB_DEBUG is enabled. Change-Id: I4dc70baefb3cd82fcc915cc2e7f68719cf6870cc Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* payloads/external: Fix up SPDX license headersAngel Pons2020-11-2212-48/+0
| | | | | | | | | | | Remove copyright notices and other unnecessary churn. Change-Id: Ie69cc121d2b6eed95aa3cbaa7215d61880148858 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47815 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* payloads/external/Makefile.inc: Fix SeaBIOS option regressionsAngel Pons2020-11-221-2/+2
| | | | | | | | | | | | | | Commit 14ca7407196 (Makefile.inc: Move adding SeaBIOS cbfs config files) introduced various regressions that were not spotted during review. TEST=Building with SEABIOS_THREAD_OPTIONROMS is working properly again. Change-Id: I4de0b11747e3df8dd31a85160add129d8cc6bd8a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47814 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Makefile.inc: Move adding SeaBIOS cbfs config filesArthur Heymans2020-11-161-0/+25
| | | | | | | | | | Using the INTERMEDIATE target this can be done in the proper dir. Change-Id: Ie105231655ef4b49234f0944f638545fe79f07cb Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46415 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload/i8042: Increase response timeout to 1.5sNico Huber2020-11-161-1/+1
| | | | | | | | | | | | | | The current timeout of 500ms is too low. For instance self-test of the KBC integrated into IT8516E took almost 1s in tests. We already check for presence of the KBC before the self-test. So the timeout should only trigger on a hardware defect and we can leave some margin. Change-Id: I95f01a4e605a9c7deb894a71e102c3a881759bb1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47588 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Delete mainboard/google/chezaJulius Werner2020-11-121-3/+0
| | | | | | | | | | | | Work on this mainboard was abandoned and never finished. It's not really usable in its current state, so let's get rid of it. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I4cd2e2cd0ee69d9846472653a942fa074e2b924d Reviewed-on: https://review.coreboot.org/c/coreboot/+/47427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* libpayload: storage.c: remove unneeded #if CONFIG()Thomas Heijligen2020-11-091-3/+1
| | | | | | | | Change-Id: I6e5679f66840105b3f9628071ac7aace9128107f Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47248 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* libpayload: Make OHCI enums into typesJacob Garber2020-11-081-28/+30
| | | | | | | | | | | | | | | | | | The OHCI header file declares various enums as follows: enum { ... } enum_name; Since the name is at the end, this is actually declaring a variable called enum_name and *not* a type, which is causing a multiple definition error in GCC 10. Move the enum_name before the opening brace to prevent this. Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Change-Id: I452c0a1b118990942aa53f1e7e77f5e8378e8975 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47224 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* libpayload: Add compiler.h to compiler parametersJacob Garber2020-11-084-4/+4
| | | | | | | | | | | | | | | | | | Headers in libpayload define various structs like so: struct struct_name { ... } __packed; However, these header files do not include the compiler.h macro that defines what __packed is, so they are actually defining a variable named __packed and *not* declaring a packed struct. This leads to defining the same variable multiple times, which was caught by GCC 10. Add compiler.h to the compiler parameters so it is included in all files automatically. Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Change-Id: Ia67182520dc94149e06fe9e03a14b3fc2ee29973 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47153 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* coreinfo: Add support for link time optimizationJacob Garber2020-11-022-1/+14
| | | | | | | | | | | | | | | | This introduces a Kconfig option for compiling coreinfo with LTO. This option can be used independently of LTO in libpayload, though will benefit most if that is enabled as well. If both are enabled, the final size of coreinfo.elf is reduced from 95 KiB to 92 KiB. Tested in QEMU and on Thinkpad T500. Change-Id: I6feacdb911b52b946869bff369e03dcf72897c9f Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38293 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-03 13:17:40 +0000