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* nvramcui: Add USB supportNicola Corna2017-03-131-0/+4
| | | | | | | | | | | | | | Enable the USB during the initialization of nvramcui. Without it the USB keyboards don't work, which makes this payload pointless on the systems where a PS/2 keyboard port isn't available. Based on https://review.coreboot.org/#/c/17507/ Change-Id: I04697c5f582b41e6f6ffe98955bf59f4fe57f66e Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18765 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* libpayload-x86: Enable SSE and FPU when presentPatrick Rudolph2017-03-081-0/+43
| | | | | | | | | | | | | | | Allows to use SSE and floating point in payloads without digging to much into x86 assembly code. Tested on Lenovo T500 (Intel Core2Duo). Both floating point operation and SSE is properly working. Change-Id: I4a5fc633f158de421b70435a8bfdc0dcaa504c72 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18345 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* payloads/seabios: Add support for Hudson UARTRicardo Ribalda Delgado2017-02-282-0/+5
| | | | | | | | | | | | | Since version 9332965 "serialio: Support for mmap serial ports", SeaBIOS supports memory mapped serial ports. This patch automatically configures SeaBIOS when the Hudson UART is enabled. Change-Id: I072f6a957df7e143d790783546b0725bcd597d9c Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-on: https://review.coreboot.org/18025 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* payloads/external/GRUB2: Add "git revision" to the GRUB2 version menuDenis 'GNUtoo' Carikli2017-02-243-0/+20
| | | | | | | | | | | | This change is based on the following commit: 3aa91dc payloads/seabios: Add "git revision" to the SeaBIOS version menu Change-Id: I9987e3673e70b5cb20173d1ddff6060f42a5374a Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: https://review.coreboot.org/18352 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload: Add oak configPaul Kocialkowski2017-02-231-0/+8
| | | | | | | | | | | This adds an oak libpayload config, that should fit all oak-based devices such as elm. Change-Id: Iabb71404ff84029a5976371a353e8c92e781ca1f Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/18447 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
* grub: Build module `boottime`Paul Menzel2017-02-171-1/+2
| | | | | | | | | | | | Configure GRUB to build with boot time statistics. That allows users to add that module to GRUB by adding `boottime` to the list of extra modules. Change-Id: I76a07e49aecb37652fe8c7d6a9421fd464424287 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/18367 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* libpayload: multiboot - support meminfo flagMathias Krause2017-02-172-15/+41
| | | | | | | | | | | | | | | | | | Some simple implementation of the MultiBoot protocol may not pass a memory map (MULTIBOOT_FLAGS_MMAP missing in the flags) but just the two values for low and high memory, indicated by the MULTIBOOT_FLAGS_MEMINFO flag. Support those kind of boot loaders too, instead of falling back to the hard-coded values in lib_get_sysinfo(). Tested with a multiboot enhanced version of FILO. Change-Id: I22cf9e3ec0075aff040390bd177c5cd22d439b81 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18350 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
* libpayload: x86/head - implement argc/argv handlingMathias Krause2017-02-171-18/+23
| | | | | | | | | | | | | | Implement the argc/argv passing as described in coreboot’s payload API: http://www.coreboot.org/Payload_API While at it, give the code some love by not needlessly trashing register values. Change-Id: Ib830f2c67b631b7216843203cefd55d9bb780d83 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18336 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
* libpayload: x86/exec - simplify and robustify the codeMathias Krause2017-02-171-39/+20
| | | | | | | | | | | | | | | | | | | Simplify the code by directly using the arguments on the stack as base pointer relative memory references, instead of loading them into intermediate registers first. Make it more robust by preserving all callee saved registers mandated by the C calling convention (and only those), namely EBP, EBX, ESI and EDI. Don't assume anything about the register state when the called function returns -- beside the segment registers and the stack pointer to be still the same as before the call. Change-Id: I383d6ccefc5b3d5cca37a1c9b638c231bbc48aa8 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18335 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
* libpayload: x86/main - propagate return value of main()Mathias Krause2017-02-171-5/+4
| | | | | | | | | | | | | | | | According to coreboot’s payload API [1], the called payload should be able to return a value via %eax. Support this by changing the prototype of start_main() and pass on the return value of main() to the caller instead of discarding it. [1] https://www.coreboot.org/Payload_API Change-Id: I8442faea19cc8e04487092f8e61aa4e5cba3ba76 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18334 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* libpayload: x86/exec - fix argc/argv value passingMathias Krause2017-02-171-1/+6
| | | | | | | | | | | | | | | According to coreboot’s payload API [1] the argc value should be passed at stack offset 0x10, so we need to push a dummy value to comply to the API. [1] https://www.coreboot.org/Payload_API Change-Id: Id20424185a5bf7e4d94de1886a2cece3f3968371 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18333 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* libpayload: x86/exec - fix return value passingMathias Krause2017-02-151-1/+1
| | | | | | | | | | | | | | The pointer to write the return value to is in %ecx, not %eax. Writing to (%eax) leads to memory corruptions as %eax holds the return value, e.g. would write zero to address zero for a "successful" returning payload. Change-Id: I82df27ae89a9e3d25f479ebdda2b50ea57565459 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18332 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* libpayload: x86/exec - fix libpayload API magic valueMathias Krause2017-02-151-1/+1
| | | | | | | | | | | | | According to coreboot’s payload API [1] the magic value passed to the payload should be 0x12345678, not 12345678. Fix that. [1] https://www.coreboot.org/Payload_API Change-Id: I10a7f7b1a4aec100416c5e7e4ba7f8add10ef5c5 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18331 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* payloads/depthcharge: Allow generic libpayload configMarshall Dawson2017-02-013-4/+20
| | | | | | | | | | | | Change depthcharge to not require a board-specific config file for libpayload. If the Kconfig option is selected, use the settings in libpayload/configs/defconfig instead. Change-Id: I4fd1a5915472f28e757c62f3f2415716f1fdfc71 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18271 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* payloads/depthcharge: Specify revision to buildMarshall Dawson2017-02-013-2/+37
| | | | | | | | | | | | | | | | | | Add the capability for specifying which version of depthcharge to checkout and build. This is similar to the existing feature for SeaBIOS. The depthcharge makefile already contains some structure for checking out master vs. stable however the calling Makefile.inc ingored this feature. Add the command-line variable assignment for these, along with a tree-ish for any revision. Change-Id: I99a5b088cb0ebb29e5d96a84217b3bfa852de8ac Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18270 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
* payloads/depthcharge: Use variable target nameMarshall Dawson2017-02-011-2/+11
| | | | | | | | | | | | | | Depending on the commit to build, depthcharge may have a different target name (depthcharge vs. depthcharge_unified). Add some logic to determine which name should be used based on the commit ID being requested. Change-Id: I05b853934d13696f4bd0d79d53ff6c5f59096d1c Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18269 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
* payloads/depthcharge: Change make target from unifiedMarshall Dawson2017-02-011-1/+1
| | | | | | | | | | | | | | | | Drop the _unified moniker from the depthcharge build. The payload and coreboot have drifted out of sync and there is no longer a non-unified depthcharge. This patch corresponds with the depthcharge change: https://review.coreboot.org/cgit/depthcharge.git/commit/?id=74a0739 Change-Id: I8d028b14d2eee63dfdc9d3dd63695f1c58ea7984 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18268 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
* SeaBIOS Kconfig: Update loggingMartin Roth2017-01-271-7/+26
| | | | | | | | | | | | | | | | | | The SeaBIOS and coreboot log levels don't really align, so setting the SeaBIOS log level to the same as coreboot's isn't really what we want. - Update default log level to use the default SeaBIOS log level. - Update the current help text to match the new defaults. - Add help text for what is displayed at various levels. - Get rid of separate type & prompt lines. - Add comments for default seabios level & logging disabled Change-Id: I5a8b75bd44748cb94a83a77ac3a379c8a9587e7b Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/18210 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Kevin O'Connor <kevin@koconnor.net>
* libpayload: fix buildPatrick Georgi2017-01-251-14/+14
| | | | | | | | | | | | When .xcompile doesn't already exist, building libpayload fails because the CC variable (et al) remain empty since .xcompile is only included after the variables coming from there are evaluated. Change-Id: I73f1cbced95afcff15839604fea5fd05d81bc3d3 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/18228 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* nvramcui: Declare variable outside for loopPaul Menzel2017-01-251-2/+4
| | | | | | | | | | | | Make the code C89 compatible, which doesn’t allow loop initial declarations. Older compilers use C89 by default, so just declare the variable outside. Change-Id: I3c5a8109e66f7a25687f4e4b2c72718d74276e04 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/18196 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* build system: don't run xcompile or git for %clean/%config targetsPatrick Georgi2017-01-242-14/+20
| | | | | | | | | | | | | | It takes a long time for no gain: We don't need to update the submodules, we don't need to fetch the revision, we don't need to find the compilers, when all we want to do is to manipulate the .config file or clean the build directory. Change-Id: Ie1bd446a0d49a81e3cccdb56fe2c43ffd83b6c98 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/18182 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload: drivers/keyboard: report power button eventsShelley Chen2017-01-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | Power button events are usually dropped because the button is not in the keyboard matrix range. Add condition to forward it like other keys. BUG=chrome-os-partner:61275 BRANCH=None TEST=reboot and make sure power button selection in depthcharge's detachable menus is processed on reef. Change-Id: I86897fa8d73a56533ef62bba05458ac3d339237e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 25654e214f0ab8685d445ced62612a02be851126 Original-Change-Id: I516a0043bd7730789728d5c5498d0a0f30a2acac Original-Signed-off-by: Shelley Chen <shchen@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/428199 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://review.coreboot.org/18177 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload: Enable USB HID in veyron configurationPaul Kocialkowski2017-01-191-1/+0
| | | | | | | | | | | | This enables USB HID support in the veyron config, since it seems to work correctly and is needed for interaction with depthcharge on devices without an embedded keyboard (such as veyron_mickey). Change-Id: Icae829e3a132005df17bcb6f7e6f8a190912576d Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/17930 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
* SeaBIOS: Add Kconfig option to set verbosity levelStefan Tauner2017-01-173-3/+17
| | | | | | | | | | | | Previously SeaBIOS's default was used (1). This patch defaults to coreboot's console level instead which is approximately the same verbosity as SeaBIOS and thus what a user would probably expect. Change-Id: If79e5f40c9380bb527f870eeb7d0cb43faf00beb Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/18051 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
* libpayload: usb: Reset ohci controller when trying to shutdown ohciJeffy Chen2017-01-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Currently we just disabled ohci interrupts when calling ohci_shutdown, Which would not actually shutdown the ohci controller, for example it may still written the increased HccaFrameNumber to Hcca buffer. Perform a soft reset to ohci controller as the linux kernel ohci-hcd driver does. BUG=chrome-os-partner:60996 BRANCH=None TEST=Checked on gru, no more "BUG: Bad page state" error in kernel. Change-Id: I128ab6ba455ac5383a4d48be0bc12b8bb4533464 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4749fc82fdd1b74ca3f2ed3fdf0ef53a5e161087 Original-Change-Id: I3f192aea627ba2fa69533bc0a4270466ca18f2a7 Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/426338 Original-Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://review.coreboot.org/18125 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* libpayload: Add VPD address into lib_sysinfoKan Yan2017-01-133-0/+11
| | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:56947 TEST=Verifed country code can be parsed from VPD in depthcharge. BRANCH=None Change-Id: I2fbbd4a784c50538331747e1ef78c33c6b8a679b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: acea6e2a200e8bd78fd458255ac7fad307406989 Original-Change-Id: I4616fefc6a377d7830397cdadb493927358e25cc Original-Signed-off-by: Kan Yan <kyan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/425819 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/18124 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* libpayload: Update ARM CrOS devices configurationPaul Kocialkowski2017-01-132-14/+6
| | | | | | | | | | | | | This updates the configuration for ARM CrOS devices (nyans and veyrons) by using the CHROMEOS Kconfig option, thus reducing the number of options to select. It also brings proper serial console support. Change-Id: Iffc84c44a1d339c5bb575fbaffc40bc2d56bb6cf Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/17928 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
* payloads/GRUB2: Add Kconfig options for grub.cfgDenis 'GNUtoo' Carikli2017-01-102-0/+31
| | | | | | | | | | Change-Id: I5480d6a5f2a6bbae4222e05bbe92eb717e1aff65 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Martin Roth <martinroth@google.com> Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/5109 Tested-by: build bot (Jenkins)
* libpayload: usb: handle situation with no free device addressPatrick Georgi2017-01-061-0/+2
| | | | | | | | | Change-Id: I1308bdca90f1a09d980f384ee85552198a39b965 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1260940 Reviewed-on: https://review.coreboot.org/18036 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload: xhci: plug leakPatrick Georgi2017-01-061-0/+1
| | | | | | | | | Change-Id: Ia163872846906c6c78144a984a405812f856f626 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1325835 Reviewed-on: https://review.coreboot.org/18035 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload: timer: cast cpu_khz to make sure 64bit math is usedPatrick Georgi2017-01-061-1/+1
| | | | | | | | | Change-Id: Iaf84de2330b433076a66c22fa72ffb45e957c0dc Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1261177 Reviewed-on: https://review.coreboot.org/18034 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* payloads/external/SeaBIOS: Bump version to 1.10.1Philipp Deppenwiese2017-01-062-2/+2
| | | | | | | | | | | | | | | | | | | | | | Changes since SeaBIOS 1.9.3 Release 1.10.0: * Initial support for Trusted Platform Module (TPM) version 2.0 * Several USB XHCI timing fixes on real hardware * Support for "LSI MPT Fusion" scsi controllers on QEMU * Support for virtio devices mapped above 4GB * Several bug fixes and code cleanups Release 1.10.1: * Updates for QEMU for reproducible builds Change-Id: I465700307d72fa44b6900b38b332603ea505ed09 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/18026 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Martin Roth <martinroth@google.com>
* payloads/external: Download FILO over HTTPSJonathan Neuschäfer2016-12-291-1/+1
| | | | | | | | | Change-Id: I1b44e32505b96978849d39764ff399a502fa6e84 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/17972 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* payloads/external: Download iPXE over HTTPSJonathan Neuschäfer2016-12-291-1/+1
| | | | | | | | | Change-Id: Ie4979ab8491ee821b39a273c5f354c445105d2a4 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/17971 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* libpayload: Get current tick from high register in generic timerPaul Kocialkowski2016-12-211-1/+1
| | | | | | | | | | | | | This fixes the generic timer driver to get the current tick from the high register, so that comparison with the high count value (obtained previously from the same register) has a chance to succeed. Change-Id: I5ce02bfa15a91ad34641b8e24813a5b7ca790ec3 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/17929 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* libpayload/drivers/video: Improve check in if conditionPatrick Georgi2016-12-141-1/+1
| | | | | | | | | | | | | | Coverity considers this a copy&paste error, and maybe it is. In any case, it makes sense to check the variable that (if the condition is true) is changed, and the values are the same before that test, so the change is harmless. Change-Id: I163c6a9f5baa05e715861dc19643b19a9c79c883 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1347376 Reviewed-on: https://review.coreboot.org/17837 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload/.../PDCurses: Improve compatibility with ncursesPatrick Georgi2016-12-141-1/+6
| | | | | | | | | | | | | | | Coverity erroneously complains that we call wmove with x or y == -1, even though our copy of that function properly checks for that. But: setsyx is documented to always return OK (even on errors), so let it do that. (and make coverity happy in the process) Change-Id: I1bc9ba2a075037f0e1a855b67a93883978564887 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1260797 Reviewed-on: https://review.coreboot.org/17836 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload/.../PDCurses: avoid reading orig before NULL checking itPatrick Georgi2016-12-141-3/+4
| | | | | | | | | | | | Coverity complains and that (unfortunately) means that some compiler might take advantage of the same fact. Change-Id: I59aff77820c524fa5a0fcb251c1268da475101fb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1261105 Reviewed-on: https://review.coreboot.org/17835 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload: Add Cougar Point PCH's AHCI to whitelistNico Huber2016-12-081-0/+1
| | | | | | | | | Change-Id: Ie8ca342a32323be4c26c236a5209052ec724317f Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17353 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
* libpayload: increase MAX_ARGC_COUNTJeremy Compostella2016-11-251-1/+1
| | | | | | | | | | | | | | | | MAX_ARGC_COUNT limits the payload to ten parameters which is not enough when used with a proprietary first stage bootloader providing hardware description using around 20 parameters. This patch makes the libpayload able to get up to 32 parameters. Change-Id: I49925040d951dffb9c11425334674d8d498821f2 Signed-off-by: Jeremy Compostella <jeremy.compostella@gmail.com> Reviewed-on: https://review.coreboot.org/17467 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: Martin Roth <martinroth@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Do not select SEABIOS_VGA_COREBOOT by default when building for QEMUArthur Heymans2016-10-271-1/+1
| | | | | | | | | | | | | On QEMU using SeaVGABIOS breaks some bootloaders, e.g. ISOLINUX does not work and GRUB works but is forced in txtmode, instead of graphical mode. Change-Id: If31d4e5ed19cbeed3f8f9dbc23cc738dd55986e5 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17122 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* FILO: update STABLEKevin Paul Herbert2016-10-271-1/+1
| | | | | | | | | | | | | | | The STABLE build of FILO does not build anymore with the current HEAD of coreboot. However, the current HEAD of FILO does build with the current HEAD of coreboot. Update FILO STABLE to FILO HEAD. Change-Id: I4eece3aaada0dfdf4da106d5d260b5b361537558 Signed-off-by: Kevin Paul Herbert <kph@platinasystems.com> Reviewed-on: https://review.coreboot.org/15195 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
* payload choice: Fix build of FILOKyösti Mälkki2016-10-271-1/+1
| | | | | | | | | | | Actual build was missing libpayload path. Change-Id: I519869d2d64c66b3d1d557595c7d13c22cd40819 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17114 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
* payloads/external/Makefile.inc: Clean up makefileMartin Roth2016-10-251-4/+21
| | | | | | | | | | | - Add comments dividing the payload sections. - Move separate TINT and Memtest sections that were intermingled. Change-Id: If0bbd6e182359c5186a8b958dd2c9ab9f0e0a3f3 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/17046 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
* mb/asus/kcma-d8,kgpe-d16: use MAINBOARD_DO_NATIVE_VGA_INITArthur Heymans2016-10-191-1/+1
| | | | | | | | | | | | | | | | MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG should only occur together with MAINBOARD_HAS_NATIVE_VGA_INIT. It seems to be used to just have to have the option to be able to select SEABIOS_VGA_COREBOOT. This patch makes these boards use MAINBOARD_DO_NATIVE_VGA_INIT and MAINBOARD_HAS_NATIVE_VGA_INIT to have it select SEABIOS_VGA_COREBOOT by default when SeaBIOS is chosen. Change-Id: If0a36af1883a3d62b16a61483733be981a85e5e2 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/16981 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
* Select SEABIOS_VGA_COREBOOT when native graphic init is selectedArthur Heymans2016-10-191-1/+1
| | | | | | | | Change-Id: I19db898a5e76bf9c151934c7979316fb3737e881 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/16965 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
* libpayload: Reintroduce CONFIG_LP_CHROMEOS to set suitable defaultsJulius Werner2016-10-173-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chrome OS builds always have some inherent differences to "standard" libpayload configurations: they don't want to use curses or things like storage drivers, they always use the coreboot framebuffer and USB, etc. This patch reintroduces CONFIG_LP_CHROMEOS as an option that only affects Kconfig defaults. This allows Chrome OS builds to select most of what they need in one go and reduces board-specific .config files to only the options that are really specific to that board. Also restricts the 8250_SERIAL_CONSOLE Kconfig to only default to yes on x86 boards, which probably makes sense for all of libpayload (some but far from all ARM boards use 8250-compatible UARTs, and we should probably not default a platform option unless it's going to be correct with very high probability). BRANCH=None BUG=None TEST=Built and booted Jerry and Oak. Change-Id: Ie0c0593ffd399608d2cbfb83d20891f6f1864914 Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Commit-Id: e558f59 Original-Change-Id: I609637cd2ea7dfb4558aa3c04c90b64038c9ab57 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/347970 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17024 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* libpayload: Replace majority of timer drivers with a generic oneJulius Werner2016-10-1710-441/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently every non-x86 platform supported by libpayload needs to provide its own timer driver. Most of the ones we have accumulated there look almost identical: For the frequency, return a preset constant. For the value, read a 32-bit register, possibly read another 32-bit register and shift+OR it with the previous one, then return that. Let's replace this with a single .c file that can easily handle all of those cases. Menuconfig convenience can still be maintained by providing several presets that select different defaults for the driver's configuration options (register address(es) and frequency). Removes an "enabled" check from Samsung MCT driver since coreboot always unconditionally enables that timer anyway. CQ-DEPEND=CL:344809 BRANCH=None BUG=None TEST=Booted Oak and Veyron, observed how dev-mode delay was still ~30s Change-Id: I61cb7d2ffd4902aa841c57f9afa9cd991f770acd Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Commit-Id: a036af6 Original-Change-Id: I9784e7c6aa5abd6d92478ea7ec1cf42c9a437546 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/347749 Reviewed-on: https://review.coreboot.org/17023 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* coreinfo: make the CBFS list scrollableBen Gardner2016-10-131-6/+27
| | | | | | | | | | | | | | This enables viewing more than ~20 files in the file list on the left. Arrows are added to indicate that more items are available off-screen. This mimics what was done in pci_module. Change-Id: Idd1363e1abe98ba51c795879db061cc54808da8e Signed-off-by: Ben Gardner <gardner.ben@gmail.com> Reviewed-on: https://review.coreboot.org/14546 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload: mvmap2315: Introduce timer driverHakim Giydan2016-10-093-0/+58
| | | | | | | | | | | Testing: booted successfully. Change-Id: I4a50c9fb7aec929ea29a3cf2eec3e424e3629c92 Signed-off-by: Hakim Giydan <hgiydan@marvell.com> Reviewed-on: https://review.coreboot.org/16692 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 04:26:17 +0000