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* tests: Disable -Wsource-mgr for clangJulius Werner2021-12-071-0/+1
| | | | | | | | | | | | | | | | Unit tests fail on clang 13.0 with a cryptic error: _timestamp_size changed binding to STB_WEAK [-Werror,-Wsource-mgr] Probably something related to the weird things we do to mock memlayout areas. Too lazy to track it down. Let's just disable this (clang-specific, not properly documented) warning flag. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ie49c9eef3c74592c068c899c6717621dbcb9f609 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59814 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
* tests: Fix objcopy --add-symbol arguments creationJakub Czapiga2021-12-061-2/+2
| | | | | | | | | | | | | | | Remove unnecessary escape bachslashes from: addr="$(echo \"$$$$sym_line\" ... The 'echo' will print output line with double quote characters, which then will be included in the values passed to --add-symbol. This can cause errors. Change-Id: I6023515191d6c236bf57870159a35d518f25e9d8 Reported-by: Yu-Ping Wu <yupingso@chromium.org> Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59858 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
* libpayload: Add CBMEM_IMD_ENTRY support to coreboot tables parserJakub Czapiga2021-12-034-88/+71
| | | | | | | | | | | | | | | | | | coreboot stores much information in the CBMEM IMD. Until now it was ignored. This patch makes use of these coreboot tables entries. It also removes get_cbmem_addr() function as it is no longer needed. Moreover, the coreboot tables entry CB_TAG_MRC_CACHE does not exist anymore, as it is not created by the code. It was replaced by CBMEM_ID_MRCDATA entry, so MRCDATA should now be accessible through sysinfo structure field. Change-Id: I5bd02a98ba2631f34014bc0f8e7ebd5a5ddd2321 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59491 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
* libpayload: Add coreboot commonlib/bsd include pathJakub Czapiga2021-12-013-2/+3
| | | | | | | | | | Make BSD part of the coreboot commonlib accessible to libpayload. Change-Id: I09f475d399ab785f3d3ffdb4b42950d2b397845e Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59697 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org>
* payloads/U-Boot: Move to v2021.10Simon Glass2021-11-251-2/+1
| | | | | | | | | | Move to building the latest U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I33fcfc3135e55d16b0dcd8135217bd5adcef2099 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* payloads/U-Boot: Enable the frame bufferSimon Glass2021-11-251-0/+1
| | | | | | | | | | | | | U-Boot normally runs with a display if available. Enable this option so that the display shows if U-Boot supports it. Use 'select' rather than 'imply' since the CI complains. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ie5684c6ead30076689f43034675ff9f3531970fe Reviewed-on: https://review.coreboot.org/c/coreboot/+/59605 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* payloads/U-Boot: Correct start addressSimon Glass2021-11-251-1/+1
| | | | | | | | | | At present U-Boot crashes on entry as the start address is wrong. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I65e32fbb4ffea04b99abe4dc5afccfacd06c986e Reviewed-on: https://review.coreboot.org/c/coreboot/+/59603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* payloads/U-Boot: Do a shallow cloneSimon Glass2021-11-251-1/+1
| | | | | | | | | | | We don't need all the git history. Speed up the build by doing a shallow clone. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: If31c9dd158aa23f242e4fd145449ef7502fb1ab1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* payloads/U-Boot: Use the correct output binarySimon Glass2021-11-252-2/+2
| | | | | | | | | | | | | The u-boot.bin file should be used, rather than u-boot-dtb.bin While they are often the same, the -dtb version is really just for legacy use now. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I5558ed94c7dd6cc57ceb835fe367bfa050ad2150 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59601 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* payloads/U-Boot: Tidy up the U-Boot buildSimon Glass2021-11-253-10/+13
| | | | | | | | | | | | | | | This doesn't work at present, merely printing an error when U-Boot is selected as a payload. This is because it adds a file into the U-Boot tree which makes U-Boot's build system think that the tree is unclean. Update the rules to put the tag file outside the source tree. Use an out-of-tree build for U-Boot to avoid changing the source tree. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I24d6545b54f97afeefaca3ffed79eec2e7afacb4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59600 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* libpayload/tests: Fix mocks __real_<func> symbol creationJakub Czapiga2021-11-241-1/+1
| | | | | | | | | | | | | There were escape backslashes around regular expression passed to grep. Because of that, grep was returning empty results as a consequence of pattern mismatch, and thus symbols pointing to original functions were not created correctly. Change-Id: I751109735b6c56824df9a560ae989bf062a0e9a6 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59496 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* libpayload: Add mock assert support for unit testing purposesJakub Czapiga2021-11-231-0/+13
| | | | | | | | | | | Some unit tests might require catching assert failures. This patch adds an assert() variant depending on __TEST__ define passed to unit tests. Change-Id: I7e4620400f27dbebc57c71bbf2bf9144ca65807f Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59495 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* libpayload/tests: remove tests/include/mocks include pathJakub Czapiga2021-11-231-1/+1
| | | | | | | | | | | | | Some files in tests/include/mocks might have the same name as main libpayload include files. Remove this path from default includes to force addition of mocks/ prefix in include paths. This will help avoiding name clashes and will also make mock headers visible. Change-Id: I4baa07472f0379d56423cf7152b1ecc9a4824539 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59493 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* Rename ECAM-specific MMCONF KconfigsShelley Chen2021-11-102-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the MMCONF Kconfigs only support the Enhanced Configuration Access mechanism (ECAM) method for accessing the PCI config address space. Some platforms have a different way of mapping the PCI config space to memory. This patch renames the following configs to make it clear that these configs are ECAM-specific: - NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT - MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT - MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS - MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER - MMCONF_LENGTH --> ECAM_MMCONF_LENGTH Please refer to CB:57861 "Proposed coreboot Changes" for more details. BUG=b:181098581 BRANCH=None TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max Make sure Jenkins verifies that builds on other boards Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* tests: Move x86 I/O functions to include/mock/arch/io.hJakub Czapiga2021-11-044-32/+17
| | | | | | | | | | | | Move th x86 I/O functions declarations from tests mocks to the mock architecture io.h. This will make x86 I/O-dependent tests simpler, because the x86_io.h from mocks will not have to be included manually. Change-Id: Ie7f06c992be306d2523f2079bc90adf114b93946 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58881 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
* payloads/Tianocore: re-add CorebootPayload build optionMatt DeVillier2021-11-013-1/+36
| | | | | | | | | | | | | | | | Some older devices, like the x230 Thinkpad, do not boot with the newer Tianocore UefiPayloadPkg build target, and cannot easily be debugged without serial UART output. As a stopgap solution, re-add the older (now deprecated/removed) CorebootPayloadPkg build target. This partially reverts commit d3b49b4c, "payloads/Tianocore: Update default build target, simplify build options" Change-Id: I81490c277626fc69d95920868d80cb24c0763de4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58710 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* libpayload: Add unit-tests framework and first test caseJakub Czapiga2021-10-188-7/+548
| | | | | | | | | | | | | This commit adds a unit-tests framework ported from coreboot, and test for drivers/speaker. Usage of the unit-tests framework is same as for the coreboot one. Change-Id: Iaa94ee4dcdc3f74af830113813df0e8fb0b31e4f Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58242 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
* libpayload: Add mock architectureJakub Czapiga2021-10-1119-2/+329
| | | | | | | | | | | | | | | | | | | | Mock architecture can be used to build libpayload using host compiler. It can be enabled by setting ARCH_MOCK=y in the dotconfig. It sets LITTLE_ENDIAN=y, as most machines these days use little-endian CPUs. Libpayload will use HOSTCC as CC, HOSTLD as LD, etc. instead of tools provided by xcompile. Mock architecture configuration can be used by payloads for testing purposes. Thanks to it, tests can be architecture-independent, and can be executed without requiring compatible Kconfig options, e.g. ARCH_ARM64=y for ARM64 machine. However, one has to provide implementation for most architecture-specific functions present in arch/* directories. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: Ie3a6e6f6cad2f8a2e48a8e546d3b79c577653080 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57708 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* payloads/tianocore/Kconfig: Extend help for bootsplash fileFelix Friedlander2021-10-091-2/+12
| | | | | | | | | | | | Add more detail as to why a smaller-than-screen-size image is to be preferred, in contrast to other payloads' bootsplash images. Signed-off-by: Felix Friedlander <felix@ffetc.net> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Change-Id: Ib4c6666bb0e49369fe8fe2ae3dc12c023f668da0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49233 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* payloads: Allow selecting UefiPayload on ARM64 platformsRex-BC Chen2021-10-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Some ARM64 platforms (e.g., MT8195) are now able to compile and run EDK2 (UefiPayload). As a result, we should allow selecting PAYLOAD_TIANOCORE for ARM64 platforms. TEST=show strings correctly. 1. make menuconfig 2. select Mainboard -> Vendor=Google, model=Cherry 3. select Payload -> Add a payload -> Tianocorepayload 4. make -j 5. build/cbfstool build/coreboot.rom extract --name fallback/payload --file out.elf -m arm64 6. file out.elf # ELF 64-bit LSB executable, ARM aarch64 7. strings out.elf | grep tianocore # lots of tianocore stuff Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I10777a341d46240b91ceeeb1be26c33a0c5db839 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58054 Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload: cbgfx: Clear screen by memcpyYu-Ping Wu2021-10-071-20/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of setting each pixel in the framebuffer, use memcpy() to clear screen faster. As this method should be fast enough, remove the fast path using memset(). The speed of clear_screen() on brya (x_resolution = 1920, bytes_per_line = 7680): - Using memset(): 15ms - Setting each pixel: 25ms - Using memcpy(): 14ms Also remove set_pixel_raw() since it's now used in only one place. BUG=none TEST=emerge-brya libpayload TEST=Saw developer screen on brya BRANCH=none Change-Id: I5f08fb50faab48d3db6b61ae022af3226914f72b Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58128 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
* libpayload: Enable UART driver for sc7280Roja Rani Yarubandi2021-10-061-0/+1
| | | | | | | | | | | | | Add Qualcomm's QUPV3 serial driver for herobrine board BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board. Change-Id: I3a745afd7bbabdd29f1f369612c990526e5a2335 Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
* driver/intel/pmc_mux/conn: Move typec_orientation enum to coreboot_tables.hNick Vaccaro2021-10-041-0/+6
| | | | | | | | | | | | | | | | | | | | Move the locally declared typec_orientation enum from chip.h to coreboot_tables.h. Change enum typec_orientation name to type_c_orientation for consistency with contents of coreboot_tables.h. Rename TYPEC_ORIENTATION_FOLLOW_CC to TYPEC_ORIENTATION_NONE. BUG=b:149830546 TEST="emerge-volteer coreboot" and make sure it compiles successfully. Change-Id: I24c9177be72b0c9831791aa7d1f7b1236309c9cd Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com>
* coreboot tables: Add type-c port info to coreboot tableNick Vaccaro2021-10-043-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | This change adds type-c port information for USB Type-C ports to the coreboot table. This allows depthcharge to know the usb2 and usb3 port number assignments for each available port, as well as the SBU and data line orientation for the board. BUG=b:149830546 TEST='emerge-volteer coreboot chromeos-bootimage' and verify it builds successfully. Cherry-pick CL to enable this feature for volteer, flash and boot volteer2 to kernel, log in and check cbmem for type-c info exported to the payload: localhost ~ # cbmem -c | grep type-c added type-c port0 info to cbmem: usb2:9 usb3:1 sbu:0 data:0 added type-c port1 info to cbmem: usb2:4 usb3:2 sbu:1 data:0 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Change-Id: Ice732be2fa634dbf31ec620552b383c4a5b41451 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57069 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* device/mmio: Make buffer_to_fifo32() take a const bufferJulius Werner2021-09-202-8/+4
| | | | | | | | | | | | | The input buffer to the buffer_to_fifo family of functions is only read, so it can be a const pointer. (Also, remove the MIPS check in libpayload for these functions... the MIPS architecture has been removed a while ago.) Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I021069680cf691590fdacc3d51f747f12ae3df31 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57731 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
* payloads/external/tianocore: Add build argument for 4G DecodeSean Rhodes2021-09-083-1/+19
| | | | | | | | | | | | | | | | Add Kconfig option TIANOCORE_ABOVE_4G_DECODE to pass build option to edk2 to enable or disable "Above 4G Decode". Disabling allows certain Linux distributions to boot such as Qubes, Zorin and Proxmox. Requires commit `2f6d4cbcc7fa49462e607baed7626524ccd59ad3` that is present in the `uefipayload_202107` branch of MrChromebox's edk2 repository. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia3b1d15196c0ec611431af29031682fea626d19d Reviewed-on: https://review.coreboot.org/c/coreboot/+/56223 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
* libpayload: Move EXTRA_CFLAGS to enable option overrideJakub Czapiga2021-09-012-2/+2
| | | | | | | | | | | | | Before this patch EXTRA_CFLAGS were placed before many other options. This made overriding impossible even, when necessary. This patch moves EXTRA_CFLAGS to be placed after original CFLAGS, thus making option overriding possible. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: If8394b151696eee4bd736d2fb1ad340209e05fbb Reviewed-on: https://review.coreboot.org/c/coreboot/+/57181 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload: cbgfx: Clear screen by sequential accessYu-Ping Wu2021-08-271-8/+13
| | | | | | | | | | | | | | | | | | | | | | Currently clear_screen() calls set_pixel() to set all pixels. However, the actual order of pixels being set depends on the framebuffer orientation. With NORMAL orientation, the framebuffer is accessed sequentially; with LEFT_UP/RIGHT_UP orientation, it is accessed back and forth, leading to performance drop (>1 second on bugzzy). Therefore, ensure sequential access to the framebuffer, regardless of the orientation. BUG=b:194967458 TEST=emerge-cherry libpayload BRANCH=dedede Change-Id: Iecaff5b6abc24ba4b3859cbc44c0d61b2a90b2d9 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57104 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload: Mark Intel 300 series AHCI as testedNico Huber2021-08-121-0/+1
| | | | | | | | | | | | Tested with filo on roda/rw14. Change-Id: Ia5f868d3a9cead0a872e6d3e9fdacd6eeb7f158b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56666 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* payloads/libpayload: add MTK_TIMER_V2 configRex-BC Chen2021-08-091-0/+6
| | | | | | | | | | | | | | | The timer structure (in particular, the offset to memory addresses) on recent MTK SoCs for example MT8195 has been changed. BUG=b:195274787 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Ifd6ff65a825c4309c47f3b115b80a8ecd42fedac Reviewed-on: https://review.coreboot.org/c/coreboot/+/56845 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* payloads/tianocore: update MrChromebox UEFIPAYLOAD branchMatt DeVillier2021-08-021-2/+1
| | | | | | | | | | | | | | | | | | | | | Update tianocore branch used with default UEFIPAYLOAD option to mrchromebox/uefipayload_202107 (July 2021) branch. This branch is rebased on edk2 upstream commit 12e34cd2f7900578ee83cb01b8f1696a7bb7511b [OvmfPkg/Bhyve: clean up TPM_ENABLE remnants] vs tag edk2-stable202105. The main changes are fixes for e820 table parsing and support to disable "Above 4G decode", which is required to boot distros with bootloaders that expect to be loaded into RAM below 4G. This fixes booting with Qubes, ZorinOS, Proxmox, among others. Additionally, several commits on top of upstream have been consolidated, reworked, and/or reordered for readability and maintainability. Change-Id: I6f04fd027a0599ca6892a1376938108a2e402ac2 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* payloads: FILO: Hook up autoboot optionsPaul Menzel2021-07-193-1/+39
| | | | | | | | | | | | | | | | | | | | | | | FILO allows to configure a line to autoboot. Hook this up into coreboot’s build system. TEST=Configure coreboot for QEMU i440fx with FILO as payload and configure: CONFIG_FILO_MASTER=y CONFIG_FILO_USE_AUTOBOOT=y CONFIG_FILO_AUTOBOOT_FILE="hda1:/vmlinuz root=/dev/sda1 console=tty0 console=ttyS0,115200 initrd=hda1:/initrd.img" CONFIG_FILO_AUTOBOOT_DELAY=5 Boot Debian image with: qemu-system-x86_64 -bios /dev/shm/coreboot/build/coreboot.rom -L /dev/shm -enable-kvm -smp cpus=2 -m 1G -hda /dev/shm/debian-32.img -serial stdio -net nic -net user,hostfwd=tcp::22222-:22 Change-Id: Id167e9a144bf466da87469108002672b299b702a Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56213 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* libpayload: curses: Only call `serial_set_color()` with initialized valuesPaul Menzel2021-07-141-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building nvramcui with i386-elf-gcc (coreboot toolchain v2021-04-06_7014f8258e) 8.3.0 and Link Time Optimization (LTO) enabled in libpayload (`CONFIG_LP_LTO=y`) fails with the error below. LPGCC nvramcui.bin curses/PDCurses/pdcurses/refresh.c: In function 'wrefresh': curses/pdcurses-backend/pdcdisp.c:217:4: error: 'bg' may be used uninitialized in this function [-Werror=maybe-uninitialized] curses/pdcurses-backend/pdcdisp.c:214:18: note: 'bg' was declared here curses/pdcurses-backend/pdcdisp.c:217:4: error: 'fg' may be used uninitialized in this function [-Werror=maybe-uninitialized] curses/pdcurses-backend/pdcdisp.c:214:14: note: 'fg' was declared here lto1: all warnings being treated as errors lto-wrapper: fatal error: i386-elf-gcc returned 1 exit status compilation terminated. /opt/xgcc/lib/gcc/i386-elf/8.3.0/../../../../i386-elf/bin/ld.bfd: error: lto-wrapper failed collect2: error: ld returned 1 exit status `pair_content()` returns in case `PAIR_NUMBER(attr)` is invalid, so guard the usage of `serial_set_color()`. if (pair < 0 || pair >= COLOR_PAIRS || !fg || !bg) return ERR; Note, building with x86_64-linux-gnu-gcc-10 (Debian 10.2.1-6) 10.2.1 20210110 does *not* fail. Change-Id: Ic63e34f2b5bc9f826db37597bebc6b20542481d7 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51914 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* util/kconfig: Uprev to Linux 5.13's kconfigPatrick Georgi2021-07-133-6/+8
| | | | | | | | | | | | | | | | | | | | | | | This was originally several commits that had to be squashed into one because the intermediate states weren't able to build coreboot: - one to remove everything that wasn't our own code, leaving only regex.[ch], toada.c, description.md and Makefile.inc. - one to copy in Linux 5.13's scripts/kconfig and adapt Makefile.inc to make the original Makefile work again. - adapt abuild to use olddefconfig, simplifying matters. - apply patches in util/kconfig/patches. - Some more adaptations to the libpayload build system. The patches are now in util/kconfig/patches/, reverse applying them should lead to a util/kconfig/ tree that contains exactly the Linux version + our own 5 files. Change-Id: Ia0e8fe4e9022b278f34ab113a433ef4d45e5c355 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37152 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* nvs: Add Chrome OS NVS (CNVS) information to coreboot tablesFurquan Shaikh2021-06-183-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CB:51638 separated Chrome OS NVS from global NVS by allocating it separately in CBMEM. CNVS is used in depthcharge to fill firmware information at boot time. Thus, location of CNVS needs to be shared in coreboot tables for depthcharge to use. This change adds a new coreboot table tag `CB_TAG_ACPI_CNVS`/`CB_TAG_ACPI_CNVS`(0x41) which provides the location of CNVS in CBMEM to payload (depthcharge). Additionally, CB:51639 refactored device nvs(DNVS) and moved it to the end of GNVS instead of the fixed offset 0x1000. DNVS is used on older Intel platforms like baytrail, braswell and broadwell and depthcharge fills this at boot time as well. Since DNVS is no longer used on any new platforms, this information is not passed in coreboot tables. Instead depthcharge is being updated to use statically defined offsets for DNVS. BUG=b:191324611, b:191324611 TEST=Verified that `crossystem fwid` which reads fwid information from CNVS is reported correctly on brya. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I3815d5ecb5f0b534ead61836c2d275083e397ff0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55665 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* includes: Move *abs() declarations into `stdlib.h`Nico Huber2021-06-182-3/+9
| | | | | | | | Change-Id: Id4df2d3210735bee737353d293450e59cf93bd9a Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55593 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* includes: Remove dangling doxygen @}Nico Huber2021-06-181-2/+0
| | | | | | | | Change-Id: I05e02f9689c1a6dafb3943657a3db975c2aeacbe Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55592 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* includes: Define `CHAR_BIT` in `limits.h`Nico Huber2021-06-181-0/+2
| | | | | | | | Change-Id: Ib1d80d0c7457f90596ef5cd9d5ad0c4a33c8d473 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55591 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* includes: Provide `wchar.h` with `wchar_t` and `wint_t`Nico Huber2021-06-183-6/+22
| | | | | | | | Change-Id: Iacb0e4eaf3f0b6bf843f3bfda5bdfde0f7a98808 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55590 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* includes: Add include guards to `stddef.h`Nico Huber2021-06-181-0/+4
| | | | | | | | Change-Id: Ifae4f07abd75da9784967c2020eed2c3fe64afa0 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55589 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* payloads/tianocore: Fix orphaned reference to 'bootloader' variableMatt DeVillier2021-06-071-1/+1
| | | | | | | | | | | | | | commit d3b49b4 [payloads/Tianocore: Update default build target, simplify build options] simplified the build string and removed the bootloader Makefile variable, but one reference was missed. Luckily the variable being empty didn't break things, but correct it regardless. Change-Id: If37b291dda59c20bfe4c6e5b9100fac52d11a2f4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55239 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* payloads/tianocore: Restrict bootsplash option to UEFIPAYLOADMatt DeVillier2021-06-071-2/+2
| | | | | | | | | | | | The custom bootsplash option only functions when using the UEFIPAYLOAD payload option, so restrict visibility to when that option is selected. Change-Id: If5fe46b629e5275da54a5e86465a68271110397b Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55145 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* payloads/tianocore: Add Kconfig option to enable cbmem loggingMatt DeVillier2021-06-073-1/+18
| | | | | | | | | | | | | | | Logging to coreboot cbmem, instead of a serial console, was added to MrChromebox's uefipayloadpkg branch. Add a Kconfig option to enable this, and restrict it to the UEFIPAYLOAD payload option, since this feature does not exist in upstream edk2. Change-Id: Idef125235dc7ba885eb22ac69c6f752588a9e295 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55144 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
* option: Turn CMOS option backend into choiceAngel Pons2021-05-281-1/+0
| | | | | | | | | | | | | In order to add more option backends, transform the current CMOS option backend into a Kconfig choice. Replace the `select` directives, as they cannot be used with choice options. Change-Id: Id3180e9991f0e763b4bae93a92d40668e7fc99bc Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54728 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* payload/tianocore: Drop TIANOCORE_TARGET_IA32Lijian Zhao2021-05-182-30/+1
| | | | | | | | | | | | Since upstream edk2 totally drop 32-bit support for UefiPayload, totaly drop it. Test: Build and run qemu successful boot up into EFI shell with UEFIPAYLOAD option. Change-Id: Iadd9a3c455fad4eede8a0a017415acd2c57fba04 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54189 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* payloads/Tianocore: Update default build target, simplify build optionsMatt DeVillier2021-05-133-40/+23
| | | | | | | | | | | | | | | | Drop the deprecated COREBOOTPAYLOAD option, and replace it with MrChromebox's updated UefiPayloadPkg option. Simplify the Kconfig options to make it easier to build from upstream edk2 master. Drop the TIANOCORE_USE_8254_TIMER Kconfig option since it applied only to CorebootPayloadPkg. Clean up the Makefile now that we're only building from a single Tianocore package/target. Test: build/boot qemu Q35 target with both UefiPayload and Upstream options. Change-Id: If545fbd0c30be6dcc6ff43107b80980fa23a527e Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54019 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload: i8042: Enable keyboard translation by default on exitDuncan Laurie2021-05-032-1/+6
| | | | | | | | | | | | | | | | | | Add a Kconfig option to set the keyboard translation state on exit and set the default to true. This restores the keyboard to the power-up defaults for firmware that does not always run libpayload keyboard init to have consistent state, and provides an option to disable translation for keyboards that might need it. Change-Id: I25dfe3f425a5bb57e97476564886672b707aa3bd Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52737 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* payloads/depthcharge: Use static_fw_config.h file for depthcharge buildBora Guvendik2021-04-231-0/+2
| | | | | | | | | | | | | | | | | Use static_fw_config.h during depthcharge build to be in line with latest depthcharge changes on the main branch. https://chromium-review.googlesource.com/c/chromiumos/platform/depthcharge/+/2523517 BUG=none TEST=Boot to OS Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Change-Id: I72a681d9321750c392000e11a21d81020dde3fd7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52403 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Varshit B Pandya <varshit.b.pandya@intel.com>
* libpayload/keyboard: Reset to scancode set #2 on exitNico Huber2021-04-181-0/+5
| | | | | | | | | | | | | | | | | If we select scancode set #1 and keep that, it can confuse Linux with keyboards that don't return to set #2 when asked to load the defaults. This happens for instance with various integrated Think- Pad keyboards but was also seen with an external PS/2 one. The chosen configuration, scancode set #2 without translation, seems to be the default for many systems. So we can expect other payloads and kernels to work with it. Change-Id: I28d74590e9f04d32bb2bbd461b67f15014f927ec Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47594 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpayload/keyboard: Add a detention stateNico Huber2021-04-181-6/+7
| | | | | | | | | | | | | | Instead of ignoring keyboards indefinitely when they failed to initialize, we wait 5s and then start over with the hotplug detection. As we always assume a present keyboard at first, we'd otherwise never have a chance to hot plug a device after the initial 30s timer ran out. Change-Id: I8dec4921b2e932442d52b5118cdcf27090633498 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-21 15:57:39 +0000