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* mb/google/volteer/eldrid: Add new DDR4 part H5AG36EXNDX019Johnny Li2022-07-143-2/+15
| | | | | | | | | | | | | | Hynix H5AG36EXNDX019 is used by the volteer variant Eldrid. Add it to the DDR4 parts list and regenerate the SPDs using spd_gen. BUG=b:236739240 BRANCH=Volteer TEST="util/spd_tools/bin/spd_gen memory_parts.json ddr4" and verify it builds successfully. Signed-off-by: Johnny Li <johnny_li@wistron.corp-partner.google.com> Change-Id: I3383dfa4e87571d920144d204270cdf646a19abf Reviewed-on: https://review.coreboot.org/c/coreboot/+/65817 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* spd: Add SPD for 4JQA-0622AD to spd/Reka Norman2021-09-232-0/+12
| | | | | | | | | | | | | | | | | | | | | Since generating the SPDs under spd/, a new part was added in https://review.coreboot.org/57550. Regenerate the SPDs to include this new part. Commands used: cp util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt \ spd/ddr4/memory_parts.json util/spd_tools/bin/spd_gen spd/ddr4/memory_parts.json ddr4 BUG=b:191776301 TEST=None Signed-off-by: Reka Norman <rekanorman@google.com> Change-Id: Ie673d1a386479f690182050ce4fee7d252ec9530 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57817 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* util/spd_tools: Remove PLK platformReka Norman2021-09-231-1/+0
| | | | | | | | | | | | | | | Currently spd_tools treats PCO and PLK as separate platforms. This is unnecessary since they have the same SPD requirements. Remove PLK, and use PCO as the platform for all zork variants. BUG=b:191776301 TEST=None Signed-off-by: Reka Norman <rekanorman@google.com> Change-Id: I7eeeab53fb3e0d92c3675fb80b4747297d4257ab Reviewed-on: https://review.coreboot.org/c/coreboot/+/57771 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* spd: Generate SPDs under spd/ using unified spd_gen toolReka Norman2021-09-2013-0/+591
Use the new unified version of the spd_gen tool to generate all LP4x and DDR4 SPDs, storing them in a new spd/ directory. Storing them in a common location allows platforms with the same SPD requirements to share SPD files, reducing duplication compared to storing SPDs in soc/ and mainboard/ directories. For each memory technology there are multiple sets of SPDs. Each set corresponds to a set of platforms with different SPD requirements, e.g. due to different memory training code expectations. A manifest file (platforms_manifest.generated.txt) lists the platform -> set mappings. Commands used to generate SPDs: cp util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt \ spd/lp4x/memory_parts.json cp util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt \ spd/ddr4/memory_parts.json util/spd_tools/bin/spd_gen spd/lp4x/memory_parts.json lp4x util/spd_tools/bin/spd_gen spd/ddr4/memory_parts.json ddr4 BUG=b:191776301 TEST=None Signed-off-by: Reka Norman <rekanorman@google.com> Change-Id: Iac82847a1a0c1f2e7271d0d3b3a7261849813a24 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>