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* Fix x86 cpu_phys_address_sizeKyösti Mälkki2012-02-291-1/+1
* Exit building if romstage.bin is larger than size of XIPzbao2012-02-171-1/+1
* Move SeaBIOS output out of coreboot source treeStefan Reinauer2012-02-071-1/+3
* X86: fix cpu_phys_address_size()Sven Schnelle2012-01-311-1/+1
* pci_ops_mmconf: Move conditional compilation to MakefileVikram Narayanan2012-01-262-5/+3
* pci_ops_conf: Indentation fixesVikram Narayanan2012-01-242-35/+47
* pci_ops_mmconf: Indentation fixesVikram Narayanan2012-01-241-23/+26
* Leave SSE and MMX instructions enabled in corebootStefan Reinauer2012-01-201-7/+0
* Add coreboot version to id areaPatrick Georgi2012-01-182-6/+9
* MTRR: get physical address size from CPUIDSven Schnelle2012-01-102-0/+22
* ACPI: mark empty get_cst_entries() weakSven Schnelle2012-01-091-1/+1
* Only BSP CPU writes CMOS in bootblock codeKyösti Mälkki2011-12-242-6/+16
* Fix ldscript for bootblock .rom sectionKyösti Mälkki2011-12-081-1/+13
* Bootblock does not need a unique boot_cpu()Kyösti Mälkki2011-12-051-5/+0
* Remove unused code files and cosmetic changesKyösti Mälkki2011-11-242-189/+0
* Fix post_code in 16bit entryKyösti Mälkki2011-11-221-4/+0
* Inline Makefile.bootblock.incPatrick Georgi2011-11-062-111/+109
* remove trailing whitespaceStefan Reinauer2011-11-011-1/+1
* Fix coreboot updatesPatrick Georgi2011-10-291-0/+1
* Get rid of the old romstage-as-bootblock ROM layoutPatrick Georgi2011-10-283-68/+0
* Get rid of AUTO_XIP_ROM_BASEPatrick Georgi2011-10-281-2/+2
* Move linux 2.6.11 workaround to generic codePatrick Georgi2011-10-271-4/+11
* SPEEDSTEP: write _CST tablesSven Schnelle2011-10-251-0/+2
* ACPI: Add function for writing _CST tablesSven Schnelle2011-10-252-0/+70
* Extend coreboot table entry for serial portsStefan Reinauer2011-10-211-2/+13
* Add macros for 64bit byte order swappingStefan Reinauer2011-10-211-6/+13
* IOAPIC: fix bitmaskKyösti Mälkki2011-10-191-1/+1
* Drop eh_frame instead of moving it into the image.Stefan Reinauer2011-10-191-1/+1
* cbfs_and_run_core() is not part of the API, make it static.Stefan Reinauer2011-10-152-2/+1
* reformat Makefile.bootblock.inc (>80 lines per char)Stefan Reinauer2011-10-151-1/+2
* Add eh_frame to rom section to fix compilation of coreboot with gcc 4.6Stefan Reinauer2011-10-141-0/+1
* Prevent build breakage without consoles enabledStefan Reinauer2011-10-131-0/+4
* refactor vesa mode setting code and bootsplash codeStefan Reinauer2011-10-131-1/+1
* Fix romstage creation with gcc 4.6 and CAR targetsStefan Reinauer2011-10-131-1/+2
* mptable: Refactor mptable generation some morePatrick Georgi2011-10-132-2/+9
* mptable: Get rid of fixup_virtual_wirePatrick Georgi2011-10-132-12/+10
* mptable: Refactor lintsrc generationPatrick Georgi2011-10-132-0/+7
* Add acpi_get_sleep_type() to i82371eb and P2B _PTS/_WAK methodsTobias Diedrich2011-09-121-1/+6
* Add automatic SMBIOS table generationSven Schnelle2011-08-263-1/+318
* Add xhcbios and ahcibios rom handlingefdesign982011-07-221-0/+0
* Do full flush on uart8250 only at end of printk.Kevin O'Connor2011-07-121-3/+16
* whitespace-only changes in acpi.c, replaced spaces with tabsCristian Măgherușan-Stanciu2011-07-021-9/+9
* Add the coreboot config to CBFSCristian Măgherușan-Stanciu2011-06-221-0/+7
* We don't have pausing versions of single-IO instructions.Stefan Reinauer2011-05-231-2/+1
* Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as anStefan Reinauer2011-04-262-1/+7
* more ifdef -> if fixes.Stefan Reinauer2011-04-211-0/+8
* more ifdef -> if fixesStefan Reinauer2011-04-212-2/+2
* some ifdef --> if fixesStefan Reinauer2011-04-212-2/+2
* Simplify coreboot's console/console.hStefan Reinauer2011-04-203-1/+136
* Recently the 3 projects using the new AMD reference code have beenScott Duplichan2011-04-191-1/+2
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