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* soc/intel/apollolake: Add cache for BIOS ROMAndrey Petrov2016-04-281-0/+1
* cpu/x86/tsc: Compile TSC timer for postcar as wellAndrey Petrov2016-04-111-0/+1
* cpu/x86/tsc: remove conditional compilationAaron Durbin2016-04-111-8/+8
* cpu/x86/tsc: compile same code for all stagesAaron Durbin2016-04-111-16/+8
* cpu/x86/tsc: prepare for CAR_GLOBAL in delay_tsc.cAaron Durbin2016-04-111-10/+19
* src/cpu/x86: remove TSC_CALIBRATE_WITH_IOAaron Durbin2016-04-112-64/+0
* am335x: Add some code for manipulating GPIOsGabe Black2016-04-103-0/+160
* am335x: Add data structures for the clock module registersGabe Black2016-04-101-0/+234
* src/: Fix lint style-labels warningsMartin Roth2016-03-312-2/+2
* arch/x86: introduce postcar stage/phaseAaron Durbin2016-03-231-0/+1
* mtrr: Define a function for obtaining free var mtrrFurquan Shaikh2016-03-181-0/+24
* cpu/x86: compile earlymtrr.c code for romstage as wellAndrey Petrov2016-03-161-0/+1
* cpu/x86/mtrr: remove early_mtrr_* functionsAaron Durbin2016-03-161-77/+0
* cpu/x86/mtrr: move cache_ramstage() to its only userAaron Durbin2016-03-161-8/+0
* cpu/via/c7: Don't manually include udelay_io.cStefan Reinauer2016-03-101-1/+3
* northbridge/intel/i440bx: Unify UDELAY selectionStefan Reinauer2016-03-101-1/+0
* x86 chipsets: utilize x86_setup_mtrrs_with_detect()Aaron Durbin2016-03-084-14/+4
* Kconfig: Remove unneeded UDELAY_IO redeclarationStefan Reinauer2016-03-084-16/+0
* cpu/x86/mtrr: add helper function to detect variable MTRRsAaron Durbin2016-03-081-3/+10
* cpu/x86: Sort some Kconfig optionsStefan Reinauer2016-03-081-9/+14
* arch/x86: document CAR symbols and expose them in symbols.hAndrey Petrov2016-03-052-7/+7
* arch/x86: always use _start as entry symbol for all stagesAaron Durbin2016-03-041-2/+10
* arch/x86: rename reset_vector -> _startAaron Durbin2016-03-041-2/+2
* cpu/x86/16bit: rename _start -> _start16bitAaron Durbin2016-03-033-10/+10
* cpu/x86/16bit/reset16: mark reset vector executableAaron Durbin2016-03-031-1/+1
* cpu/x86/16bit/reset16: remove stale 32-bit jumpAaron Durbin2016-03-031-3/+0
* tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"Denis 'GNUtoo' Carikli2016-02-261-1/+1
* cpu/qemu-power8: don't enable it for qemu-x86Patrick Georgi2016-02-191-1/+1
* power8: qemu "cpu"Ronald G. Minnich2016-02-193-0/+73
* cpu/amd: Add socket FM2Damien Zammit2016-02-185-0/+45
* cpu/amd: Update/Add license headersDamien Roth2016-02-1414-12/+190
* CPU/intel: Add missing license headersDamien Roth2016-02-1414-0/+182
* cpu/allwinner: Update license headersDamien Roth2016-02-1322-52/+306
* Make MRC vs native a config rather than making a separate chipset for it.Vladimir Serbinenko2016-02-121-2/+0
* cpu/x86/tsc: Compile delay_tsc.c for the bootblock as wellAlexandru Gagniuc2016-02-111-0/+1
* cpu/intel/microcode: allow microcode to be loaded in romstageAaron Durbin2016-02-102-4/+5
* cpu/amd/fam10h-fam15h: Honor CMOS option to disable CPB (core boost)Timothy Pearson2016-02-051-0/+14
* cpu/amd/fam10h-15h: Set PowerStepUp/PowerStepDown on Fam15hTimothy Pearson2016-02-051-48/+52
* src: Fix various spelling and whitespace issues.Martin Roth2016-02-021-2/+2
* amd/agesa/family15tn: Add Richland CPU IDLoic2016-02-021-0/+1
* src/: Fix Kcofig symbols missing CONFIG_ prefixMartin Roth2016-02-021-1/+1
* cpu/amd/fam10h-15h: Add workaround for AMD Erratum 600Timothy Pearson2016-02-011-0/+4
* cpu/amd/fam10h-fam15h: Add new wait_ap_stopped functionTimothy Pearson2016-02-011-0/+20
* cpu/amd/fam10h-15h: Fix Family 15h boot hang when BSP lift enabledTimothy Pearson2016-02-012-2/+8
* cpu/amd/fam10h-fam15h: Correctly create APIC ID on single node systemsTimothy Pearson2016-01-291-1/+5
* Move object files to $(obj)/<class>/Nico Huber2016-01-282-17/+19
* Makefile: Make full use of src-to-obj macroNico Huber2016-01-283-5/+5
* cpu/amd/family_10h-family_15h: Move CBMEM storage out of CC6 save regionTimothy Pearson2016-01-242-1/+51
* cpu/amd/family_10h-family_15h: Set LDT tristate correctly on C32 socketsTimothy Pearson2016-01-242-19/+39
* cpu/amd: remove .intel_syntaxPatrick Georgi2016-01-232-68/+62
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