coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	device/dram/ddr2.c: Fix log messages	Elyes HAOUAS	2022-02-08	1	-5/+4
*	src: Change BOOL CONFIG_ to CONFIG() in comments & strings	Martin Roth	2020-07-26	1	-1/+1
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi	2020-05-06	1	-11/+1
*	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi	2020-05-06	1	-2/+1
*	AUTHORS: Move src/device copyrights into AUTHORS file	Martin Roth	2019-09-17	1	-3/+0
*	dram: Add basic DDR4 SPD parsing	Andrey Petrov	2019-08-14	1	-1/+1
*	src/{device,drivers}: Add missing 'include <types.h>'	Elyes HAOUAS	2019-05-29	1	-0/+1
*	src/device/dram: Fix typo	Elyes HAOUAS	2018-09-11	1	-1/+1
*	device/dram/ddr2.c: Add methods to compute to identify dram	Arthur Heymans	2018-04-09	1	-0/+24
*	src/device/dram/ddr2: Fix supported burst lengths	Elyes HAOUAS	2018-03-14	1	-2/+2
*	device/ddr2,ddr3: Rename and move a few things	Arthur Heymans	2018-02-22	1	-7/+7
*	device/dram/ddr2.c: Store the checksum in the decoded SPD struct	Arthur Heymans	2017-12-20	1	-0/+1
*	device/dram/ddr2.c: fix a hidden syntax error introduced earlier	Bill XIE	2017-09-26	1	-1/+1
*	device/dram/ddr2.c: Decoding byte[12] bit7 as self refresh flag	Arthur Heymans	2017-09-22	1	-7/+10
*	device/dram/ddr2: Add break to several case statements that lack it	Patrick Georgi	2017-09-22	1	-0/+6
*	device/dram/ddr2.c: Improve error returning and debug output	Arthur Heymans	2017-09-20	1	-39/+99
*	device/dram/ddr2: Fix decoding tRR	Arthur Heymans	2017-09-16	1	-6/+9
*	device/dram/ddr2: Add a function to normalize tCLK	Arthur Heymans	2017-09-06	1	-7/+26
*	device/dram/ddr2.c: Fix is_registered_ddr2	Arthur Heymans	2017-06-09	1	-1/+2
*	device/dram/ddr2: Add common ddr2 spd decoder	Patrick Rudolph	2017-03-10	1	-0/+630