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* EPIA-M fixupRonald G. Minnich2005-11-221-1/+8
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* This was posted on issue tracker and approve by ron minnichRonald G. Minnich2005-11-212-5/+4
| | | | | | | Signed-off-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Correct transposed arguments in pnp_set_drq().Steven J. Magnani2005-09-091-1/+1
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* missed cache_as_ram_auto.cYinghai Lu2005-07-081-0/+228
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* eric patchYinghai Lu2005-07-0810-431/+1093
| | | | | | | | | | | | | | | | | | | 1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51arch import user (historical)2005-07-061-1/+1
| | | | | | | | | Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-44arch import user (historical)2005-07-062-8/+8
| | | | | | | | | | | Creator: Li-Ta Lo <ollie@lanl.gov> Correct VGA support Make the VGA support for both VGA and no VGA cases. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-42arch import user (historical)2005-07-061-0/+4
| | | | | | | | | | | Creator: Li-Ta Lo <ollie@lanl.gov> missing commit for emulator update Which one is more stupid? TLA or me? git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1958 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-39arch import user (historical)2005-07-065-34/+27
| | | | | | | | | | | | Creator: Li-Ta Lo <ollie@lanl.gov> TLA sucks again This is the third time I try to commit only the emulator changes. I hope this patch contains the emulator changes only. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-38arch import user (historical)2005-07-068-39/+42
| | | | | | | | | | | Creator: Li-Ta Lo <ollie@lanl.gov> emulator update x96emu update from Paulo git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-36arch import user (historical)2005-07-068-42/+39
| | | | | | | | | | | Creator: Li-Ta Lo <ollie@lanl.gov> emulator update Correction to the reduce emulator from Paulo git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34arch import user (historical)2005-07-061-0/+5
| | | | | | | | | Creator: Yinghai Lu <yhlu@tyan.com> AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-30arch import user (historical)2005-07-065-6/+62
| | | | | | | | | Creator: Yinghai Lu <yhlu@tyan.com> Nvidia Ck804 support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-10arch import user (historical)2005-07-064-12/+26
| | | | | | | | | Creator: Yinghai Lu <yhlu@tyan.com> pci_rom.h smbus device parent device print git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* fixed a bug cause failure on some expensive VGA cardsLi-Ta Lo2005-03-041-1/+1
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1918 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* comment out ht_setup_linkYinghai Lu2005-01-261-18/+29
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* move apic cluster before pci_domain in MB Config.lbYinghai Lu2005-01-211-13/+0
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* removed unused codeLi-Ta Lo2005-01-192-198/+17
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* minor reformatLi-Ta Lo2005-01-193-17/+13
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* linkb_to_hostYinghai Lu2005-01-191-1/+1
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* class code reverseYinghai Lu2005-01-181-17/+21
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* linkb_to_host and addon display card override onboard card.Yinghai Lu2005-01-173-45/+65
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* CONFIG_PCI_ROM_RUNYinghai Lu2005-01-144-4/+32
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* onboard pci_rom second runYinghai Lu2005-01-141-1/+0
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* onboard pci_rom disable onboardYinghai Lu2005-01-142-1/+8
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* onboard pci_rom finally doneYinghai Lu2005-01-141-0/+12
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* onboard pci_onboard worksYinghai Lu2005-01-131-10/+9
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* fixed a logic bugLi-Ta Lo2005-01-131-1/+1
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* better embedded ROM support, done blindlyLi-Ta Lo2005-01-132-10/+12
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* remove #include chip.hLi-Ta Lo2005-01-131-4/+1
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* onboard pci_romYinghai Lu2005-01-132-4/+13
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* works for PCI vga cards tooLi-Ta Lo2005-01-116-30/+38
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* removed validation codeLi-Ta Lo2005-01-111-789/+0
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* fixed abs() impelmentationLi-Ta Lo2005-01-111-1/+10
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* added PCI expansion ROM support,Li-Ta Lo2005-01-1025-2/+15876
| | | | | | | works for some ATI and Nvidia AGP cards now. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* clean up VGA and Expansion ROM supportLi-Ta Lo2004-12-272-64/+49
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Allocating resource for Expansion ROMLi-Ta Lo2004-12-232-26/+76
| | | | | | | More correct resource allocation for legacy VGA on K8 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* allocating resource for legacy VGA frame buffer, it is not 100%Li-Ta Lo2004-12-033-58/+52
| | | | | | | correct but it works anyway. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1811 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* i2c mux supportYinghai Lu2004-12-032-0/+94
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* update comment according to the new DOMLi-Ta Lo2004-11-253-73/+103
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1799 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* - First stab at getting the ppc ports building and working.Eric Biederman2004-11-184-11/+75
| | | | | | | | | | - The sandpointx3+altimus has been consolidated into one directory for now. - Added support for having different versions of the pci access functions on a per bus basis if needed. Hopefully I have not broken something inadvertently. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* - To reduce confuse rename the parts of linuxbios bios that run fromEric Biederman2004-10-303-34/+60
| | | | | | | | | | | | | | | | | | | | | ram linuxbios_ram instead of linuxbios_c and linuxbios_payload... - Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86 - ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB. - Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work. - Start using romcc's built in preprocessor (This will simplify header compiler checks) - Add helper functions for examining all of the resources - Remove debug strings from chip.h - Add llshell to src/arch/i386/llshell (Sometime later I can try it...) - Add the ability to catch exceptions on x86 - Add gdb_stub support to x86 - Removed old cpu options - Added an option so we can detect movnti support - Remove some duplicate definitions from pci_ids.h - Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic - Minor romcc bug fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* sizeram removal/conversion.Eric Biederman2004-10-271-0/+2
| | | | | | | | | | | | | - mem.h and sizeram.h and all includes killed because the are no longer needed. - linuxbios_table.c updated to directly look at the device tree for occupied memory areas. - first very incomplete stab a converting the ppc code to work with the dynamic device tree - Ignore resources before we have read them from devices, (if the device is disabled ignore it's resources). - First stab at Pentium-M support - add part/init_timer.h making init_timer conditional until there is a better way of handling it. - Converted all of the x86 sizeram to northbridge set_resources functions. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* - Bump the LinuxBIOS major versionEric Biederman2004-10-214-23/+42
| | | | | | | | | | | | | | | | | | | - Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* - First stab at running linuxbios without the old static device tree.Eric Biederman2004-10-168-257/+36
| | | | | | | Things are close but not quite there yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* - Finish interrupted mergeEric Biederman2004-10-141-28/+30
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* - Updates for 64bit resource support, handling missing devices and cpus in ↵Eric Biederman2004-10-147-329/+637
| | | | | | the config file git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1664 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* - First pass through with with device tree enhancement merge. Most of the ↵Eric Biederman2004-10-146-262/+309
| | | | | | | | | mechanisms should be in place but don't expect anything to quite work yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* epia-m supportRonald G. Minnich2004-10-061-3/+7
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1655 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* code reformatLi-Ta Lo2004-07-082-5/+9
| | | | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1