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* fsp/intel common: Add support for Gfx PEIM (AKA GOP)robbie zhang2015-10-272-3/+2
* gma ACPI: Make brightness levels a per board settingNico Huber2015-10-224-24/+26
* cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc2015-10-151-4/+4
* fsp1_1: add verstage supportAaron Durbin2015-10-147-3/+134
* gma ACPI: Do not overwrite backlight configurationNico Huber2015-10-123-10/+17
* gma ACPI: Consolidate non-PCH and PCH brightness levelsNico Huber2015-10-123-78/+47
* gma: Consolidate Intel IGD ACPI code some moreNico Huber2015-10-123-0/+155
* intel fsp1_1: prepare for romstage vboot verification splitAaron Durbin2015-10-116-140/+295
* intel: update common and FSP cache-as-ram parametersAaron Durbin2015-10-112-27/+27
* Kill lvds_num_lanesVladimir Serbinenko2015-10-111-1/+0
* Derive lvds_dual_channel from EDID timings.Vladimir Serbinenko2015-10-111-1/+0
* fsp1_0: Fix broken logic when searching for FSPWerner Zeh2015-10-081-2/+2
* fsp/cache_as_ram.inc and boards: Fix incorrect usage of POST_IOAlexandru Gagniuc2015-10-061-56/+14
* fsp1_1: move relocation algorithm to commonlibAaron Durbin2015-10-025-549/+1
* fsp1_1: use commonlib/endian.h routinesAaron Durbin2015-10-021-61/+62
* cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc2015-09-301-1/+1
* intel/fsp1_0: Declare microcode to be size 0 if it doesn't existPatrick Georgi2015-09-301-1/+5
* intel/fsp1.0: Get size of microcode during build timeWerner Zeh2015-09-291-1/+9
* coreboot: introduce commonlibAaron Durbin2015-09-221-1/+1
* drivers/intel/fsp1_1: split relocation code for tool useAaron Durbin2015-09-174-518/+547
* drivers/intel/fsp1_1: handle UEFI endiannessAaron Durbin2015-09-171-58/+102
* drivers/intel/fsp1_1: prepare relocation code for sharingAaron Durbin2015-09-171-22/+38
* fsp1_1: provide binding to UEFI versionAaron Durbin2015-09-1011-30/+147
* FSP: Pass FSP image base address to find_fspLee Leahy2015-09-103-5/+6
* drivers/intel/fsp1_1: Take platform ID as a string, not integersAlexandru Gagniuc2015-09-082-12/+13
* intel: Do not hardcode the position of mrc.cacheAlexandru Gagniuc2015-09-072-12/+1
* bootstate: remove need for #ifdef ENV_RAMSTAGEAaron Durbin2015-09-041-4/+0
* x86: remove cpu_incs as romstage Make variableAaron Durbin2015-09-041-3/+1
* drivers/intel/fsp1_1/fsp_util.c: Use ALIGN_UP_macroAlexandru Gagniuc2015-08-311-1/+1
* drivers/intel/fsp_1_1: Remove useless #ifndef/#error pairsAlexandru Gagniuc2015-08-312-22/+0
* intel/fsp1_1/hob.c: Refactor file to match coreboot coding styleAlexandru Gagniuc2015-08-291-119/+45
* drivers/intel/fsp1_1: Don't compile GOP support in romstageAlexandru Gagniuc2015-08-293-5/+1
* fsp1_1: remove duplicate mrc caching mechanismAaron Durbin2015-08-295-442/+0
* edid: Use edid_mode struct to reduce redundancyDavid Hendricks2015-08-281-13/+14
* fsp1_1: fsp_relocate: use struct region_device and struct progAaron Durbin2015-08-142-8/+29
* FSP 1.1: Update the CBFS image typeLee Leahy2015-07-101-1/+1
* Kconfig: Remove unnecessary and incorrect MRC_CACHE symbolsMartin Roth2015-06-272-24/+0
* Intel FSP 1.1: Move Kconfig comment inside 'if' blockMartin Roth2015-06-251-2/+2
* FSP 1.1: Bring source up-to-dateLee Leahy2015-06-244-9/+53
* Remove empty lines at end of fileElyes HAOUAS2015-06-082-2/+0
* Remove address from GPLv2 headersPatrick Georgi2015-06-041-2/+1
* Hide PLATFORM_USES_FSP1_1.Vladimir Serbinenko2015-06-021-1/+1
* cbfs: new API and better program loadingAaron Durbin2015-06-023-11/+9
* igd.asl rewriteVladimir Serbinenko2015-05-285-0/+260
* Remove address from GPLv2 headersPatrick Georgi2015-05-281-1/+1
* drivers/intel: Update FSP 1.1 DriverLee Leahy2015-05-2312-657/+1600
* Remove address from GPLv2 headersPatrick Georgi2015-05-2126-27/+26
* ivybridge native gfx init: Adjust state to be compatible with OPROM.Vladimir Serbinenko2015-05-192-0/+25
* gma/edid: Fix gma register access.Vladimir Serbinenko2015-05-191-2/+2
* FSP 1.1 Comparison BaseLee Leahy2015-05-128-0/+1422
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