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* include/device/device.h: Remove CHIP_NAME() macroNicholas Sudsgaard2024-01-316-6/+6
| | | | | | | | | | | | | | | | | | | | | | | Macros can be confusing on their own; hiding commas make things worse. This can sometimes be downright misleading. A "good" example would be the code in soc/intel/xeon_sp/spr/chip.c: CHIP_NAME("Intel SapphireRapids-SP").enable_dev = chip_enable_dev, This appears as CHIP_NAME() being some struct when in fact these are defining 2 separate members of the same struct. It was decided to remove this macro altogether, as it does not do anything special and incurs a maintenance burden. Change-Id: Iaed6dfb144bddcf5c43634b0c955c19afce388f0 Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80239 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Jakub Czapiga <czapiga@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
* driver/parade to /driver/wwan: Rename Makefiles from .inc to .mkMartin Roth2024-01-246-0/+0
| | | | | | | | | | | | | | | | The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I8cf3d2e2cd1b6ebe4e941ad64f27698379fef696 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80080 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers: Add SPDX license headers to MakefilesMartin Roth2023-08-066-0/+12
| | | | | | | | | | | | | | | | | | | | | | To help identify the licenses of the various files contained in the coreboot source, we've added SPDX headers to the top of all of the .c and .h files. This extends that practice to Makefiles. Any file in the coreboot project without a specific license is bound to the license of the overall coreboot project, GPL Version 2. This patch adds the GPL V2 license identifier to the top of all makefiles in the drivers directory that don't already have an SPDX license line at the top. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I8442bc18ce228eca88a084660be84bcd1c5de928 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68980 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Tim Crawford <tcrawford@system76.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
* drivers/soundwire/cs42l42: Support CS42L42 SoundWire deviceKapil Porwal2023-05-254-0/+354
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CS42L42 low power audio codec can be connected over SoundWire and be configured for mainboards to use: - Data Port 0 and Bulk Register Access - Data Port 1 is the 64bit data output for the headset - Data Port 2 is the 64bit data input for the headset - Data Port 3 is the 64bit data input for the headset The data port and audio mode properties are filled out as best as possible with the datasheet as a reference. The ACPI address for the codec is calculated with the information in the codec driver combined with the devicetree.cb hierarchy where the link and unique IDs are extracted from the device path. For example this device is connected to master link ID 0 and has strap settings configuring it for unique ID 0. chip drivers/soundwire/cs42l42 register "desc" = ""Headset Codec"" device generic 0.0 on end end This driver was tested with the rex0 reference design by booting and disassembling the runtime SSDT to ensure that the devices have the expected address and properties. Device (SW00) { Name (_ADR, 0x00001001FA424200) // _ADR: Address Name (_DDN, "Headset Codec") // _DDN: DOS Device Name Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { GpioInt (Edge, ActiveBoth, Exclusive, PullDefault, 0x0000, "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer, , ) { // Pin list 0x0166 } GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer, , ) { // Pin list 0x0167 } }) Name (_DSD, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "irq-gpios", Package () { \_SB.PCI0.HDAS.SNDW.SW00, Zero, Zero, Zero } }, Package () { "reset-gpios", Package () { \_SB.PCI0.HDAS.SNDW.SW00, One, Zero, Zero } }, Package () { "cirrus,ts-inv", One }, Package () { "cirrus,ts-dbnc-rise", 0x05 }, Package () { "cirrus,ts-dbnc-fall", Zero }, Package () { "cirrus,btn-det-init-dbnce", 0x64 }, Package () { "cirrus,btn-det-event-dbnce", 0x0A }, Package () { "cirrus,bias-lvls", Package () { 0x0F, 0x08, 0x04, One } }, Package () { "cirrus,hs-bias-ramp-rate", 0x02 }, Package () { "cirrus,hs-bias-sense-disable", One }, Package () { "mipi-sdw-sw-interface-revision", 0x00010000 }, [...] Package () { "mipi-sdw-source-port-list", 0x02 }, Package () { "mipi-sdw-sink-port-list", 0x0C } }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-bra-mode-0", "BRA0" }, Package () { "mipi-sdw-dp-0-subproperties", "DP0" }, Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }, Package () { "mipi-sdw-dp-1-source-subproperties", "SRC1" }, Package () { "mipi-sdw-dp-2-sink-subproperties", "SNK2" }, Package () { "mipi-sdw-dp-3-sink-subproperties", "SNK3"} } }) Name (BRA0, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-bra-mode-bus-frequency-configs", Package () { 0x00AC4400, ... } }, Package () { "mipi-sdw-bra-mode-max-data-per-frame", 0x1000 }, Package () { "mipi-sdw-bra-mode-min-us-between-transactions", Zero } } }) Name (DP0, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-port-max-wordlength", 0x40 }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-bra-mode-0", "BRA0" } } }) Name (MOD0, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-audio-mode-bus-frequency-configs", Package () { 0x00AC4400, ... } }, Package () { "mipi-sdw-audio-mode-max-sampling-frequency", 0x0002EE00 }, Package () { "mipi-sdw-audio-mode-min-sampling-frequency", 0x1F40 }, [...] } }) Name (SRC1, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-data-port-type", Zero }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" } } }) Name (SNK2, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-data-port-type", Zero }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" } } }) Name (SNK3, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-data-port-type", Zero }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" } } }) } BUG=b:269497731 TEST=Verified SSDT for SNDW in the OS Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: Ic7cfe2a21c76ba01ad3dea2a5017b28743aeb9f1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73279 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/soundwire/max98363: Support MAX98363 SoundWire deviceKapil Porwal2023-05-254-0/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MAX98363 smart speaker amp can be connected over SoundWire and be configured for mainboards to use: - Data Port 0 and Bulk Register Access is not supported - Data Port 1 is the 32bit data input for the speaker path The data port and audio mode properties are filled out as best as possible with the datasheet as a reference. The ACPI address for the codec is calculated with the information in the codec driver combined with the devicetree.cb hierarchy where the link and unique IDs are extracted from the device path. For example this device is connected to master link ID 2 and has strap settings configuring it for unique ID 0. chip drivers/soundwire/max98363 register "desc" = ""Left Speaker Amp"" device generic 2.0 on end end This driver was tested with the rex0 reference design by booting and disassembling the runtime SSDT to ensure that the devices have the expected address and properties. Device (SW20) { Name (_ADR, 0x000230019F836300) // _ADR: Address Name (_DDN, "Left Speaker Amp") // _DDN: DOS Device Name Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_DSD, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-sw-interface-revision", 0x00010000 }, [...] Package () { "mipi-sdw-source-port-list", Zero }, Package () { "mipi-sdw-sink-port-list", 0x02 } }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }, Package () { "mipi-sdw-dp-1-sink-subproperties", "SNK1" } } }) Name (MOD0, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-audio-mode-bus-frequency-configs", Package () { 0x00927C00, ... } }, Package () { "mipi-sdw-audio-mode-sampling-frequency-configs", Package () { 0x3E80, ... } }, [...] } }) Name (SNK1, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-data-port-type", Zero }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" } } }) } BUG=b:269497731 TEST=Verified SSDT for SNDW in the OS Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: Ie56109d615759e3e5e32782c8782cb2f47014ec4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73278 Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* device/mipi: Move to drivers/mipiJulius Werner2021-08-264-4/+4
| | | | | | | | | | | | | | Sounds like we prefer to have this under drivers/ instead of device/. Also move all MIPI-related headers out from device/ into their own directory. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ib3e66954b8f0cf85b28d8d186b09d7846707559d Reviewed-on: https://review.coreboot.org/c/coreboot/+/57128 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* drivers/soundwire/alc1308 : Add ALC1308 soundwire deviceAnil Kumar2021-02-274-0/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds new soundwire device ALC1308 The codec properties are filled out as best as possible with the datasheet as a reference. The ACPI address for the codec is calculated with the information in the codec driver combined with the devicetree.cb hierarchy where the link and unique IDs are extracted from the device path. The unique ID is calculated from schematics by referring to ASEL[1:0] strap settings. Datasheet of ALC1308 provides info about the mapping of ASEL strap settings to unique ID For example this device is connected to master link ID 1 and has strap settings configuring it for unique ID 2. chip drivers/soundwire/alc1308 register "desc" = ""Left Speaker"" device generic 1.2 on end end Bug=None Test=Build and boot on TGLRVP.Extract SSDT and confirm that the entries for PCI0.HDAS.SNDW are present for ALC1308 Test speaker out functionality Signed-off-by: Anil Kumar <anil.kumar.k@intel.com> Change-Id: Ibf3f1d5c6881cbd106e96ad1ff17ca216aa272ac Reviewed-on: https://review.coreboot.org/c/coreboot/+/51042 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Sathyanarayana Nujella Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* acpi: Call acpi_fill_ssdt() only for enabled devicesKarthikeyan Ramasubramanian2020-11-093-3/+3
| | | | | | | | | | | | | | | | | | | Individual drivers check whether the concerned device is enabled before filling in the SSDT. Move the check before calling acpi_fill_ssdt() and remove the check in the individual drivers. BUG=None TEST=util/abuild/abuild Change-Id: Ib042bec7e8c68b38fafa60a8e965d781bddcd1f0 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47148 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Christian Walter <christian.walter@9elements.com>
* drivers/soundwire/alc711: Add Realtek ALC711 soundwire deviceAnil Kumar2020-10-304-0/+170
| | | | | | | | | | | | | | Bug=None Test=Enabled the device on TGLY RVP and tested that the codec is reflected in SSDT. Checked sound card binding works and soundwire drivers are enabled in kernel. Signed-off-by: Anil Kumar <anil.kumar.k@intel.com> Change-Id: Ia7358927fe8531e609ebe070bef259a2bbc09093 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46303 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* drivers/soundwire/alc5682: Support Realtek ALC5682 SoundWire deviceDuncan Laurie2020-05-224-0/+193
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ALC5682 headset codec can be connected over SoundWire and be configured for mainboards to use: - Data Port 0 and Bulk Register Access is supported - Data Ports 1-4 are supported as both source and sink The data port and audio mode properties are filled out as best as possible with the datasheet as a reference. The ACPI address for the codec is calculated with the information in the codec driver combined with the devicetree.cb hierarchy where the link and unique IDs are extracted from the device path. For example this device is connected to master link ID 0 and has strap settings configuring it for unique ID 1: chip drivers/soundwire/alc5682 register "desc" = ""Headset Codec"" device generic 0.1 on end end This driver was tested with the volteer reference design by booting and disassembling the runtime SSDT to ensure that the devices have the expected address and properties. Device (SW01) { Name (_ADR, 0x000021025D568200) Name (_DDN, "Headset Codec") Name (_DSD, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-sw-interface-revision", 0x00010000 }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-bra-mode-0", "BRA0" }, Package () { "mipi-sdw-dp-0-subproperties", "DP0" }, Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }, Package () { "mipi-sdw-dp-1-source-subproperties", "SRC1" }, Package () { "mipi-sdw-dp-1-sink-subproperties", "SNK1" }, [...] } } Name (BRA0, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-bra-mode-bus-frequency-configs", Package () { 0x000F4240, [...] } }, [...] } } Name (DP0, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-bra-flow-controlled", Zero }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-bra-mode-0", "BRA0" } } } Name (MOD0, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-audio-mode-bus-frequency-configs", Package () { 0x000F4240, [...] } }, [...] } } Name (SNK1, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-data-port-type", Zero }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" } } } Name (SNK1, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-data-port-type", Zero }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" } } } } BUG=b:146482091 Signed-off-by: Duncan Laurie <dlaurie@google.com> Change-Id: I488dcd81d2e66a6f2c269ab7fa9f7ceaf2cbf003 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40891 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/soundwire/max98373: Support MAX98373 SoundWire deviceDuncan Laurie2020-05-224-0/+179
The MAX98373 smart speaker amp can be connected over SoundWire and be configured for mainboards to use: - Data Port 0 and Bulk Register Access is not supported - Data Port 1 is the 32bit data input for the speaker path - Data Port 3 is the 16bit data output for I/V sense ADC path The data port and audio mode properties are filled out as best as possible with the datasheet as a reference. The ACPI address for the codec is calculated with the information in the codec driver combined with the devicetree.cb hierarchy where the link and unique IDs are extracted from the device path. For example this device is connected to master link ID 1 and has strap settings configuring it for unique ID 3. chip drivers/soundwire/max98373 register "desc" = ""Left Speaker Amp"" device generic 1.3 on end end This driver was tested with the volteer reference design by booting and disassembling the runtime SSDT to ensure that the devices have the expected address and properties. Device (SW13) { Name (_ADR, 0x000123019F837300) Name (_DDN, "Left Speaker Amp") Method (_STA) { Return (0x0F) } Name (_DSD, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-sw-interface-revision", 0x00010000 }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }, Package () { "mipi-sdw-dp-1-sink-subproperties", "SNK1" }, Package () { "mipi-sdw-dp-3-source-subproperties", "SRC3" }, } } Name (MOD0, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-audio-mode-bus-frequency-configs", Package () { 0x00753000, [...] } }, [...] } } Name (SNK1, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-data-port-type", Zero }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" } } } Name (SRC3, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-data-port-type", Zero }, [...] }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-port-audio-mode-0", "MOD0" } } } } BUG=b:146482091 Signed-off-by: Duncan Laurie <dlaurie@google.com> Change-Id: I3f8cb2779ddde98c5df739bd8a1e83a12a305c00 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40890 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-29 17:31:26 +0000