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* ChromeOS: Fix <vc/google/chromeos/chromeos.h>Kyösti Mälkki2021-11-091-1/+1
| | | | | | | | Change-Id: Ibbdd589119bbccd3516737c8ee9f90c4bef17c1e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58923 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* ec/google/chromeec: Register USB-C mux operationsDerek Huang2021-10-062-1/+20
| | | | | | | | | | | | Register USB-C mux operations to the generic interface. BUG=b:192947843 Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com> Change-Id: I576c9e4c6c82d6b4055b0a0a9a75c677d4b05220 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58061 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
* ec/google/chromeec: Update google_chromeec_usb_pd_get_info()Derek Huang2021-10-062-4/+2
| | | | | | | | | | | | | | google_chromeec_usb_pd_get_info() is used in ec.c only. Make it static and drop from ec.h. BUG=b:192947843 Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com> Change-Id: I4b3df4223d5c26ea1c1a52b26f7d49fa4c947de8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58060 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
* ec/google/chromeec: Add new API for USB-C mux handlingDerek Huang2021-10-062-0/+44
| | | | | | | | | | | | | Add google_chromeec_get_usbc_mux_info() to obtain USB-C mux related information. BUG=b:192947843 Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com> Change-Id: Idc27f23214c2d5b91334ae3efe248100329964ba Reviewed-on: https://review.coreboot.org/c/coreboot/+/58059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
* ec/google/chromeec: Add APIs for USB-C DP ALT modeDerek Huang2021-10-062-0/+54
| | | | | | | | | | | | | | | | | | Add API to allow AP to send the command to EC to enter DP ALT mode and API to wait for DP HPD event. BUG=b:192947843 TEST=select ENABLE_TCSS_DISPLAY_DETECTION in Kconfig.name. Build coreboot and update your system. Boot the system you will find below message in the coreboot log with or without USB-C display connected: 'HPD ready after %lu ms' or 'HPD not ready after %ldms. Abort.'. Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com> Change-Id: Id11510c1ff58579ae2cddfe5a4d69646fd84f5c3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57138 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
* ec/google/chromeec: Update some PD and DisplayPort APIsDerek Huang2021-10-062-13/+29
| | | | | | | | | | | | | | | | 1. Update google_chromeec_pd_get_amode() to return bitmask. 2. Update google_chromeec_wait_for_displayport() to handle the updated return value of google_chromeec_pd_get_amode(). 3. Drop google_chromeec_pd_get_amode() from ec.h and make it static because it's not used outside of ec.c. BUG=b:192947843 Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com> Change-Id: I6020c4305e30018d4c97d862c16e8d642c951765 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58058 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
* ec/google/chromeec: Update google_chromeec_usb_pd_control()Derek Huang2021-10-062-3/+5
| | | | | | | | | | | | | | | Add parameter `active_cable` to obtain the cable type (active or passive) which is needed for USB-C configuration for some SoCs (at least Intel TGL and ADL), change the function name to google_chromeec_usb_pd_get_info() for better understanding. BUG=b:192947843 Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com> Change-Id: Ie91a3096d49d5dde75e60ab0f2f38152cef720f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58057 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
* src/acpi to src/lib: Fix spelling errorsMartin Roth2021-10-057-8/+8
| | | | | | | | | | | | These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I5b8ecdfe75d99028fee820a2034466a8ad1c5e63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58080 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/purism: Remove copied code from system76Arthur Heymans2021-09-272-63/+2
| | | | | | | | | | This code is identical except for some renaming. Change-Id: I93795a6087ce0daca27c0d5038a1febd6ca9c775 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56522 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
* ec/google/chromeec: Update ec_commands.hRob Barnes2021-09-221-2/+25
| | | | | | | | | | | | | | | This change copies ec_commands.h directly from Chromium OS EC repo at sha 8c2c6bd5b1d44b367929af498d4d4b0df126a4ef. BUG=b:188073399 TEST=Build coreboot BRANCH=None Change-Id: I674cb860adb6b8497a8aecf47952ed8f85ddaa70 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57758 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org>
* ec/system76/ec: acpi: Implement _BIX methodIan Douglas Scott2021-09-172-0/+79
| | | | | | | | | | | | Implement _BIX method to expose battery cycle count. Requires an EC version with support for cycle count. Change-Id: I5f7a1d275caff59960aaf9c39b9c707970350987 Signed-off-by: Ian Douglas Scott <idscott@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57678 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jeremy Soller <jeremy@system76.com>
* ec/acpi: Remove empty "chip" driverNico Huber2021-09-081-4/+0
| | | | | | | | | | | | There was no code attached to this driver and hence one couldn't hook it up to any device. Even if mentioned in the `devicetree.cb` it was still dead code. Change-Id: I12415ea9e0120b1d00524f8f39f9b2d02f46ba05 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57431 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/google/chromeec: Add code for KEY_MICMUTE and KEY_KBD_BKLIGHT_TOGGLEScott Chao2021-08-062-2/+61
| | | | | | | | | | | | | | | | | | | | | | | | - Chromebook have some platform need support MICMUTE and KBDILLUMTOGGLE. - Sync ec_commands.h This change syncs the coreboot version of google ec_commands.h with the ec_commands.h from the google ec repository. This is a straight copy except for the the copyright header. BUG=b:194146863 BRANCH=none TEST=check on evtest type 4 (EV_MSC), code 4 (MSC_SCAN), value 9e type 1 (EV_KEY), code 228 (KEY_KBDILLUMTOGGLE), 1 type 4 (EV_MSC), code 4 (MSC_SCAN), value 9b type 1 (EV_KEY), code 248 (KEY_MICMUTE), value 1 Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: Ie4fa3e627f448265f72279704d258b2d3fe8fc17 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56710 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/roda/it8518/acpi: Remove unnecessary assignmentsFelix Singer2021-07-282-8/+4
| | | | | | | | | | Simplify some operations to get rid of unnecessary assignments. Change-Id: I02c93d42ce1de693d5d58fd9a29ccd5bff0f5978 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56609 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* ec/roda/it8518/acpi: Use lower-case hex formatFelix Singer2021-07-282-12/+12
| | | | | | | | | | | | Built roda/rw11 with `BUILD_TIMELESS=1` and coreboot.rom remains the same. Change-Id: I9f08b048d41ab7a5d7d7dc735779ea019517491a Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56608 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/roda/it8518/acpi: Use mathematical operatorsFelix Singer2021-07-282-5/+5
| | | | | | | | | | Use mathematical operators instead of their equivalent methods. Change-Id: I5b1d5d9882eae5e8bcf2d97bcefaeea1a7ad8f4d Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56607 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/roda/it8518/acpi: Use bit-wise and logical operatorsFelix Singer2021-07-282-8/+8
| | | | | | | | | | | | | Use bit-wise and logical operators instead of their equivalent methods. Built roda/rw11 with `BUILD_TIMELESS=1` and coreboot.rom remains the same. Change-Id: I30807e14b2a9a8203a76d418f586423bcaec2a3a Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* ec/roda/it8518/acpi: Make use of the assignment operatorFelix Singer2021-07-282-25/+25
| | | | | | | | | | Replace `Store()` with the assignment operator. Change-Id: I2931a3e1b9a55198ec4dacc9218b6c9028052631 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56605 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/roda/it8518/acpi: Get rid of `Index()`Felix Singer2021-07-281-9/+9
| | | | | | | | | | | | | Use `FOOO[1337]` instead of `Index(FOOO, 1337)`. Built roda/rw11 with `BUILD_TIMELESS=1` and coreboot.rom remains the same. Change-Id: I4f5d5cb8ce8c3ae37dc44ca87bd67596af9feee8 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56604 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/roda/it8518/acpi: Use decimal integers for accessing indexesFelix Singer2021-07-281-9/+9
| | | | | | | | Change-Id: I7d4fb69a223e3b48a790e9144d2682619c18d513 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/roda/it8518/acpi: Make use of `Printf("...")`Felix Singer2021-07-284-34/+34
| | | | | | | | | | | | | Replace `Store("...", Debug)` with `Printf("...")`. Built roda/rw11 with `BUILD_TIMELESS=1` and coreboot.rom remains the same. Change-Id: Ie1a1f7320ef2850e4f861b1426240e6940036844 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/roda/it8518/acpi: Don't hard-code GPE offsetNico Huber2021-07-281-1/+1
| | | | | | | | | | | | | The GPE offset of 16 is PCH specific. Built roda/rw11 with `BUILD_TIMELESS=1` and coreboot.rom remains the same. Change-Id: I4ec38fc28d2436f84a090bb4ab38f20612cfd795 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56080 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/kontron/kempld: Add minimal GPIO driverMaxim Polyakov2021-07-165-1/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds an interface for configuring GPIOs inside the Kontron CPLD/EC. This allows to statically define the mode for each GPIO pin in devicetree.cb of the motherboard or carrier board. For example: chip ec/kontron/kempld device gpio 0 on register "gpio[0]" = "KEMPLD_GPIO_INPUT" register "gpio[4]" = "KEMPLD_GPIO_OUTPUT_LOW" register "gpio[5]" = "KEMPLD_GPIO_OUTPUT_HIGH" register "gpio[11]" = "KEMPLD_GPIO_DEFAULT" end end In this case, <device gpio 0>, like all other devices, is not a real device inside the EC. These definitions are used to understand the EC resources and systematize configuration options, but if mark this as <off>, the initialization step will be skipped in the driver code. Use KEMPLD_GPIO_DEFAULT or skip it in devicetree.cb to not configure the GPIO and keep the default mode after CPLD reset. This work is based on code from the drivers/gpio/gpio-kempld.c linux driver. Tested on Kontron mAL-10 COMe module [1]. [1] CB:54380 , Change-Id: I7d354aa32ac8c64f54b2bcbdb4f1b8915f55264e Change-Id: Id767aa451fbf2ca1c0dccfc9aa2c024c6f37c1bb Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47595 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/google: Use EC_HOST_EVENT_NONERob Barnes2021-06-305-10/+10
| | | | | | | | | | | | | | google_chromeec_get_event returns 0 for no event. Return EC_HOST_EVENT_NONE=0 to improve readability. BUG=b:184074997 TEST=Build and boot guybrush without error Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ic08ed9ccdd7c0023d0fe8b641fcf60dca495a242 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55547 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* ec/google: Sync ec_commands.hRob Barnes2021-06-301-13/+173
| | | | | | | | | | | | | | | | | This change syncs the coreboot version of google ec_commands.h with the ec_commands.h from the google ec repository. This is a straight copy except for the the copyright header. BUG=b:184074997 TEST=Build and boot guybrush BRANCH=None Change-Id: I095c3316d720328cb7b8dd1b72ffc108208b14bd Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55911 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* ec/google/wilco: Fix comment about enclosure typeKyösti Mälkki2021-06-211-1/+1
| | | | | | | | | | | | SYSTEM_TYPE_CONVERTIBLE is not valid SMBIOS enclosure type, but selecting it implies SMBIOS_ENCLOSURE_CONVERTIBLE. Change-Id: Ib658af7b80586428b22f08a738964637e1fbd17a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42141 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/purism/librem/ec.asl: Disable notification for touchpad enable/disableMatt DeVillier2021-06-211-3/+5
| | | | | | | | | | | | | | | Somehow, enabling the notification to the OS driver breaks the functionality it was meant to enable. Until this can be resolved, disable the driver notification, so that the key functions as intended. Test: build/boot librem_bdw and librem_skl boards, verify trackpad enable toggle via Fn+F1 works properly. Change-Id: Ic7bdb3154a87c4202b5ee1fd333281ef78db1104 Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55657 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/google: Fix bad return valueRob Barnes2021-06-171-1/+1
| | | | | | | | | | | | | | | | google_chromeec_get_event returns an event number and 0 when there's no event. This function is usually called in a loop until there are no more events, so it makes sense to return 0 (i.e. no event) when there's an error. BUG=b:184074997 TEST=Boot guybrush, no ec errors Change-Id: I6c0186e4637af9ae24f45cce3638f0913227d6a7 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55437 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/google/chromeec: Separate SMBIOS SKU functionsYu-Ping Wu2021-06-093-36/+44
| | | | | | | | | | | | | | | | | All functions in ec_skuid.c except google_chromeec_get_board_sku() are for SMBIOS platforms. Move these functions to a new file to allow non-SMBIOS platforms to use google_chromeec_get_board_sku() without having to declare MAINBOARD_SMBIOS_MANUFACTURER. BUG=none TEST=emerge-cherry coreboot BRANCH=none Change-Id: I8916223f5f04afe4761be4ad3313e900efae90d4 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* ec: Add Star Labs ITE 8987E supportSean Rhodes2021-06-0413-0/+1083
| | | | | | | | | | Support for Star Labs labtop series EC Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I1967f7c4a7e3cab714f22844bf36749e0c9652b6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52797 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* ec/kontron/kempld: Guard macro parametersAngel Pons2021-05-281-2/+2
| | | | | | | | | | Add parentheses around macro parameters to avoid operation order issues. Change-Id: I2d4552abaeda5702619cc53e9dfae1f17b048e67 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54952 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* ec/google/wilco: Extend description of `EC_GOOGLE_WILCO`Paul Menzel2021-05-281-0/+7
| | | | | | | | | | | Change-Id: Ia278b538a8904651d16c37d095972fa78e264288 Link: https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/7S5OJMLQUEIU6YK36JTTRINF5OOCI66V/ Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54929 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
* ec/google/wilco/mailbox: Fix format warning by using size_t length modifierPaul Menzel2021-05-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building google/sarien with a 64-bit compiler (x86_64-linux-gnu) fails with the error below. src/ec/google/wilco/mailbox.c: In function 'wilco_ec_transfer': src/ec/google/wilco/mailbox.c:184:43: error: format '%lu' expects argument of type 'long unsigned int', but argument 4 has type 'size_t' {aka 'unsigned int'} [-Werror=format=] 184 | printk(BIOS_ERR, "%s: data too short (%lu bytes, expected %zu)", | ~~^ | | | long unsigned int | %u 185 | __func__, rs.data_size - skip_size, msg->response_size); | ~~~~~~~~~~~~~~~~~~~~~~~~ | | | size_t {aka unsigned int} `data_size` has type `uint16_t`, and `skip_size` has type `size_t`, whose size differs in 32-bit (unsigned int) and 64-bit (unsigned long). So use the length modifier `z` for a `size_t` argument. Found-by: x86_64-linux-gnu-gcc-10 (Debian 10.2.1-6) 10.2.1 20210110 Change-Id: Ida27323daeed9b8ff487302d0f3d6fcce0bbb705 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54786 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Duncan Laurie
* ec/google/chromeec: Implement support for DRIVERS_ACPI_THERMAL_ZONERaul E Rangel2021-05-201-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the required method to access temperature data from the ChromeEC. BUG=b:186166365 TEST=Boot guybrush to the OS and verify temperatures $ tail /sys/devices/virtual/thermal/thermal_zone*/temp ==> /sys/devices/virtual/thermal/thermal_zone0/temp <== 31900 ==> /sys/devices/virtual/thermal/thermal_zone1/temp <== 34900 ==> /sys/devices/virtual/thermal/thermal_zone2/temp <== 31900 ==> /sys/devices/virtual/thermal/thermal_zone3/temp <== 33900 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I418b6691a7d00a4c2d89c9c1fe8f9416602be0f1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54133 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/google/chromeec: Provide EC access for Retimer firmware upgradeJohn Zhao2021-05-181-0/+13
| | | | | | | | | | | | | | | coreboot needs to access EC RFWU entry in order to suspend and resume PD and modes setting. This change adds ec_retimer_fw_update implementation for retimer firmware upgrade. BUG=b:186521258 TEST=Build image successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: Ib937d8bd72fc39487854773573b435bf2add672a Reviewed-on: https://review.coreboot.org/c/coreboot/+/52713 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/google/chromeec: Remove ec_retimer_fw_updateJohn Zhao2021-05-181-22/+0
| | | | | | | | | | | | | | | Along with upstream kernel for Retimer firmware update, coreboot changes the ec_retimer_fw_update format. This change removes this API and will add implementation later once the dependent definition is complete. BUG=b:186521258 TEST=Build image successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I2d074b84fb3cb87b443871104b72b6c316af5279 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52710 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* src: Retype option API to use unsigned integersAngel Pons2021-05-065-20/+20
| | | | | | | | | | | | | The CMOS option system does not support negative integers. Thus, retype and rename the option API functions to reflect this. Change-Id: Id3480e5cfc0ec90674def7ef0919e0b7ac5b19b3 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* ec/lenovo/h8/h8.c: Skip setting volume if out of rangeAngel Pons2021-04-291-2/+2
| | | | | | | | | | | | | | | | | This change is needed to update the option API to use unsigned integers. The CMOS option system does not support negative numbers. The volume field is only 8 bits long. Do not set the volume if it is out of range. Also, use an out-of-range value as fallback to skip setting the volume when it cannot be read using the option API, to preserve the current behavior. Change-Id: I7af68bb5c1ecd4489ab4b826b9a5e7999c77b1ff Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52675 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* chromeec: Fix google_chromeec_status_check timeoutRob Barnes2021-04-291-17/+14
| | | | | | | | | | | | | | | | | | Rewrite google_chromeec_status_check to use stopwatch instead of a delay in a while loop. In practice the while loop ends up taking much longer than one second to timeout. Using stopwatch library will accurately timeout after one second. BUG=b:183524609 TEST=Build and run on guybrush BRANCH=None Change-Id: I363ff7453bcf81581884f92797629a6f96d42580 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51775 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* ec/purism/librem-ec: Apply initial Purism customizationsNicole Faerber2021-04-215-76/+68
| | | | | | | | | | | | | | | - remove unused Kconfig options - change ACPI device name and HID - remove ACPI for unused color keyboard backlight - add support for RGB notification LED - rename Wifi LED ACPI variable - set some battery info defaults not populated by the EC Change-Id: I72eca9deb83e5a6d919d6fcbd3b354fbf6e7a925 Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52391 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/purism/librem-ec: Add support for Purism Librem ECMatt DeVillier2021-04-2112-0/+870
| | | | | | | | | | | Initial commit is a clone of ec/system76/ec with string changes; Purism-specific functionality will be added in subsequent commits. Change-Id: I8c51724e6dbfe1bc09496537f9e031643f95c755 Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ec/kontron: Use get_int_option()Angel Pons2021-04-211-6/+5
| | | | | | | | Change-Id: Ibca7660ed03525903a1146a1fb2937550406bee8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* ec/lenovo: Use get_int_option()Angel Pons2021-04-214-58/+24
| | | | | | | | Change-Id: Ie5cb54b171244be71848a59a788ed8d42b3e3161 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47111 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* chromeec: make ssfc optional in fw_configKangheui Won2021-04-121-4/+2
| | | | | | | | | | | | | | | | | | | When EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG is enabled and SSFC is not set, all fw_config is invalidated. But for some platform this may not be necessary, we can treat missing SSFC as zero and use other 32 bits of firmware config. BUG=b:184809649 TEST=boot and check fw_config is not -1 even if ssfc is not set BRANCH=zork Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: I21c7b0d449a694d28ad7b3f14b035e3a5830030a Reviewed-on: https://review.coreboot.org/c/coreboot/+/52205 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Marco Chen <marcochen@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* ec/lenovo/h8/acpi: fix wrong calculationMichael Niewöhner2021-04-081-1/+1
| | | | | | | | | | | | | | The conversion to ASL 2.0 syntax in commit 81d55cf introduced a regression triggering a BUG in Linux when reading the battery current. Correct the wrongly-converted calculation. Fixes: 81d55cf ("src/ec/lenovo/h8/acpi/battery.asl: Convert to ASL 2.0") Tested-by: Andrew A. I. <aidron@yandex.ru> Change-Id: I1cea8f56eb0a674005582c87cad89f10a02d0701 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52144 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/system76/ec: Add OLED screen toggleJeremy Soller2021-02-273-0/+9
| | | | | | | | | Change-Id: I667accd980da6384a7cc6a3f4eb7565b8b3b2400 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50490 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* ec/system76/ec: Clean up/document battery ACPIJeremy Soller2021-02-271-41/+41
| | | | | | | | | | Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Change-Id: I3a67008d84da614e8c8cbfa681a0fdd19ff1d77f Reviewed-on: https://review.coreboot.org/c/coreboot/+/50497 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Alexey Vazhnov <vazhnov@boot-keys.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* ec/google/chromeec: Optionally include SSFC in firmware configKarthikeyan Ramasubramanian2021-02-272-1/+19
| | | | | | | | | | | | | | | | Fetch second source factory cache configuration (SSFC) as an optional element to the firmware config interface. Introduce a Kconfig so that it can be enabled and used on required mainboards. BUG=b:177055126 TEST=Build and Boot to OS in Magolor. Change-Id: I81137406d21e77b5d58a33f66778e13cf16c85c7 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51094 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ec/system76/ec: Preserve ECOS through suspendJeremy Soller2021-02-271-0/+7
| | | | | | | | | | | | When the EC is reset on PLTRST this information will be lost, causing system control interrupts to potentially stop functioning. Change-Id: I137ef6c574a372601bc51f6e815158767acd0e1b Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50489 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* src/ec/quanta/ene_kb3940q/acpi/battery.asl: Convert to ASL 2.0Elyes HAOUAS2021-02-101-31/+30
| | | | | | | | Change-Id: I7cc47536b0c1e2c903df29402090abfccde82406 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50318 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-10 11:47:59 +0000