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* x86: add SMM save state for 0x0100 revisionAaron Durbin2014-01-301-0/+86
* x86: parallel MP initializationAaron Durbin2014-01-301-0/+120
* x86: add common definitions for control registersAaron Durbin2014-01-282-31/+119
* x86/mtrr: don't assume size of ROM cached during CAR modeAaron Durbin2014-01-281-4/+0
* x86: include header to define types in useAaron Durbin2014-01-281-0/+2
* Multiboot: remove multiboot tables generation.Vladimir Serbinenko2014-01-231-184/+0
* cpu/intel: Make all Intel CPUs load microcode from CBFSAlexandru Gagniuc2014-01-161-4/+0
* Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki2014-01-151-3/+31
* cpu/cpu.h: Allow compiling with __SIMPLE_DEVICE__Vladimir Serbinenko2014-01-061-0/+2
* AMD boards (non-AGESA): Cleanup earlymtrr.c includesKyösti Mälkki2013-12-261-0/+4
* lynxpoint: Route all USB ports to XHCI in finalize stepDuncan Laurie2013-12-211-0/+1
* cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFSAlexandru Gagniuc2013-12-131-1/+1
* AMD boards: Fix includes for microcode updatesKyösti Mälkki2013-12-091-1/+6
* smi: Update mainboard_smi_gpi() to have 32bit argumentDuncan Laurie2013-11-241-2/+2
* Rename cpu/x86/car.h to arch/early_variables.hStefan Reinauer2013-10-131-60/+0
* CBMEM: Always select CAR_MIGRATIONKyösti Mälkki2013-09-211-1/+1
* Include boot_cpu.c for romstage buildsKyösti Mälkki2013-08-151-0/+4
* AMD Kabini: Add CPU AGESA wrapper for new AMD processor familySiyuan Wang2013-08-051-0/+47
* include: Fix spellingMartin Roth2013-07-116-18/+18
* include/cpu/amd: Align `CPU_ID_EXT_FEATURES_MSR` with other definesPaul Menzel2013-06-033-3/+3
* Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`Ronald G. Minnich2013-05-251-0/+13
* x86: add cache-as-ram migration optionAaron Durbin2013-05-161-0/+29
* Make early x86 POST codes written to IO port optionalMartin Roth2013-05-111-1/+6
* Get rid of a number of __GNUC__ checksStefan Reinauer2013-05-102-10/+0
* Drop prototype guarding for romccStefan Reinauer2013-05-104-6/+2
* x86: use asmlinkage macro for smm_handler_tAaron Durbin2013-05-081-2/+3
* x86: add TSC_CONSTANT_RATE optionAaron Durbin2013-05-071-0/+4
* x86: use boot state callbacks to disable rom cacheAaron Durbin2013-05-011-3/+0
* Revert "siemens/sitemp_g1p1: Make ACPI report the right mmconf region"Nico Huber2013-04-121-2/+0
* siemens/sitemp_g1p1: Make ACPI report the right mmconf regionPatrick Georgi2013-04-101-0/+2
* mtrr: add rom caching comment about hyperthreadsAaron Durbin2013-04-051-1/+5
* AMD: Drop six copies of wrmsr_amd and rdmsr_amdKyösti Mälkki2013-04-045-12/+20
* intel/microcode.h: Fix typo in comment: micr*o*codePaul Menzel2013-04-031-1/+1
* boot: add disable_cache_rom() functionAaron Durbin2013-04-011-0/+3
* x86: add rom cache variable MTRR index to tablesAaron Durbin2013-03-291-0/+3
* x86: mtrr: add CONFIG_CACHE_ROM supportAaron Durbin2013-03-291-0/+16
* x86: add new mtrr implementationAaron Durbin2013-03-291-11/+23
* x86: unify amd and non-amd MTRR routinesAaron Durbin2013-03-221-0/+2
* x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer2013-03-221-2/+2
* x86: protect against abi assumptions from compilerAaron Durbin2013-03-211-1/+1
* intel microcode: split up microcode loading stagesAaron Durbin2013-03-191-0/+7
* Google Link: Add remaining code to support native graphicsRonald G. Minnich2013-03-151-0/+7
* haswell: reserve default SMRAM spaceAaron Durbin2013-03-151-0/+3
* x86: SMM Module SupportAaron Durbin2013-03-141-0/+80
* GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel2013-03-0112-12/+12
* smm: Update rev 0x30101 SMM revision save stateAaron Durbin2013-02-271-12/+25
* AMD Family12h: Fix warningsMartin Roth2013-02-181-1/+0
* Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi2013-02-111-0/+3
* speedstep: Deduplicate some MSR identifiersPatrick Georgi2013-02-091-0/+3
* Unify assembler function handlingStefan Reinauer2012-12-061-1/+1
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