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* nb/intel/x4x: Move boilerplate romstage to a common locationArthur Heymans2019-11-151-35/+4
* mb/*/*(ich7/x4x): Use common early southbridge initArthur Heymans2019-11-141-13/+1
* sb/intel/i82801gx: Add common LPC decode codeArthur Heymans2019-11-126-10/+11
* mb/{x4x}: Remove unused 'include <northbridge/intel/x4x/iomap.h>'Elyes HAOUAS2019-11-111-1/+0
* mb/asrock/h110m/devicetree: fix VR config infoMaxim Polyakov2019-11-041-15/+15
* mb/asrock/h110m: use SSDT generator for SuperIOMaxim Polyakov2019-11-042-120/+102
* sb/intel/lynxpoint: Use sb/intel/common/platform.aslArthur Heymans2019-11-041-1/+1
* mb/*/*{i82801gx}: Use sb/intel/common/acpi/platform.aslArthur Heymans2019-11-042-29/+1
* mb/*/*{bd82x6x/ibexpreak}: Use sb/intel/common/acpi/platform.aslArthur Heymans2019-11-041-1/+1
* mb/intel/{i82801gx,x4x}: Don't select ASPM optionsArthur Heymans2019-11-031-3/+0
* soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpiSubrata Banik2019-11-014-4/+4
* mb/asrock/h110m: configure SuperIO Deep SleepMaxim Polyakov2019-10-311-3/+3
* src/mainboard: change "unsigned" to "unsigned int"Martin Roth2019-10-271-1/+1
* sb/intel/bd82x6x/lpc: Set up default LPC decode rangesArthur Heymans2019-10-161-3/+0
* sb/intel/i82801gx: Move CIR init to a common placeArthur Heymans2019-10-111-6/+1
* soc/intel/skylake: devicetree: introduce PchHdaVcType fsp parameterMichael Niewöhner2019-10-022-2/+1
* mb/asrock/h110m: configure SuperIO global registersMaxim Polyakov2019-09-141-5/+15
* mb/asrock/h110m: configure GPIOs in SuperIO chipMaxim Polyakov2019-09-141-9/+30
* mb/asrock/h110m: enable ACPI LDN in SuperIOMaxim Polyakov2019-09-141-1/+7
* mb/asrock/h110m: set I/O Range for SuperIO HWMMaxim Polyakov2019-09-141-0/+3
* mb/asrock/h110m: add missing pci devices to treeMaxim Polyakov2019-09-091-0/+2
* mb/asrock/h110m: disable unused sata portsMaxim Polyakov2019-09-091-4/+6
* mb/asrock/h110m: disable unused serial busesMaxim Polyakov2019-09-091-3/+3
* mb/asrock/h110m: remove unsed i2c_voltage settingsMaxim Polyakov2019-09-091-2/+0
* mb/asrock/h110m: use VR_CFG_AMP() macro to set PSI thresholdMaxim Polyakov2019-09-091-12/+12
* mb/asrock/h110m: fix VR domains configurationMaxim Polyakov2019-09-091-5/+6
* mb/asrock/h110m: rewrite gpio config using macrosMaxim Polyakov2019-09-011-244/+480
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-262-2/+2
* mb/{asrock,intel,purism}: Copy channel arrays separatelyJacob Garber2019-08-201-6/+10
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-182-5/+2
* sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supportedPatrick Rudolph2019-07-191-1/+0
* intel/haswell: Replace monotonic timerKyösti Mälkki2019-07-131-1/+0
* mb/asrock/h110m: set serirq_mode to continuous modeMaxim Polyakov2019-06-271-0/+3
* mb/asrock/h110m: Correct Kconfig symbol selectionAngel Pons2019-06-211-1/+1
* soc/intel/skylake: Clean up KconfigArthur Heymans2019-06-211-1/+0
* sb/intel/i82801gx: Detect if the southbridge supports AHCIArthur Heymans2019-06-064-4/+0
* mb/*/devicetree.cb: Remove unavailable PCIe portsArthur Heymans2019-06-054-8/+0
* sb/amd/cimx/sb800: Get rid of power button device in corebootPaul Menzel2019-05-201-9/+0
* mb/asrock/h81m-hds: Drop now obsolete libgfxinit overrideNico Huber2019-05-121-8/+0
* nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGENico Huber2019-05-121-1/+1
* sb/intel/lynxpoint: Enable LPC/SIO setup in bootblockArthur Heymans2019-04-233-31/+51
* nb/intel/sandybridge: Drop pch.h from sandybridge.hPatrick Rudolph2019-04-231-0/+1
* src/mb/Kconfig: Fix PCI subsystem IDsElyes HAOUAS2019-04-192-16/+0
* sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIBPatrick Rudolph2019-04-131-0/+1
* mb/asrock/h110m: Add virtual LDN for SuperIO to DTMaxim Polyakov2019-04-111-6/+19
* mb/asrock/h110m: Add PEG Gen3 supportMaxim Polyakov2019-04-061-0/+8
* mb/asrock/h110m: Set PEG as primary GFX deviceMaxim Polyakov2019-04-061-0/+1
* {mb,soc/intel/skylake}: remove unused InternalGfxMaxim Polyakov2019-04-061-1/+0
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-203-3/+0
* mainboard: Add ASRock H110M-DVSMaxim Polyakov2019-03-1921-0/+1271