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* mb/*: Specify type of `MAINBOARD_PART_NUMBER` onceAngel Pons2021-07-261-1/+0
| | | | | | | | | | | | | | | | Specify the type of the `MAINBOARD_PART_NUMBER` Kconfig symbol once instead of doing so on each and every mainboard. Change-Id: I3692f9e82fe90af4d0da1d037018a20aa1b45793 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56554 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/*: Specify type of `MAINBOARD_DIR` onceAngel Pons2021-07-261-1/+0
| | | | | | | | | | | | | | | | Specify the type of the `MAINBOARD_DIR` Kconfig symbol once instead of doing so on each and every mainboard. Change-Id: If1cc538b0c4938dac193699897b690e402b3c1e8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56553 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* bd82x6x boards: Drop redundant `c2_latency`Angel Pons2021-06-071-1/+0
| | | | | | | | | | If unspecified, chipset code already uses 101, and 0x65 == 101. Change-Id: I524ca492fa577003df23017756f74a455582132f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55212 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* sandybridge boards: Drop default `pci_mmio_size`Angel Pons2021-04-051-1/+0
| | | | | | | | | | 2 GiB is the default already. Change-Id: I294460949659c97d4e19ad4e9d14f8c3566cca3f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52071 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/biostar/th61-itx/early_init.c: Clean includesElyes HAOUAS2021-02-031-2/+1
| | | | | | | | Change-Id: I0619e567527812bd0e7088d23d91f114c8fec9ec Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50200 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* ACPI: Add top-level ASLKyösti Mälkki2021-01-271-0/+1
| | | | | | | | | | | | | | | | | | | Objects that are created with acpigen need to be declared with External () for the generation of dsdt.asl to pass iasl without errors. There are some objects that are common to all platforms, and some that should be declared only conditionally. Having a top-level ASL helps to achieve this. Change-Id: Ibaf1ab9941b82f99e5fa857c0c7e4b6192c74330 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* mb/x/acpi_tables: Rename to mainboard_fill_gnvs()Kyösti Mälkki2021-01-101-8/+0
| | | | | | | | | | | | | | | Rename acpi_create_gnvs() functions under mb/ to reflect their changed functionality. Remove now empty mb/acpi_tables.c files. Change-Id: Ia366867ef73d1ade9805dc29b8e14b3073f44f60 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48707 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* cpu/intel/model_206ax: Rename `cX_acpower` optionsAngel Pons2021-01-061-3/+3
| | | | | | | | | | They aren't specific to AC power operation anymore. Also adapt autoport. Change-Id: Ib04d0a08674b7d2773d440d39bd6dfbd4359e0fb Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49089 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* cpu/intel/model_206ax: Unify ACPI C-state optionsAngel Pons2021-01-061-3/+0
| | | | | | | | | | | | | | | | All mainboards use the same values for AC and battery, even desktop boards without a battery. Use the AC values everywhere and drop the battery values. Subsequent commits will rename the AC power options accordingly, and will also clean up the corresponding acpigen code. This is intentional so as to ease reviewing the devicetree changes. Also update util/autoport accordingly. Change-Id: I581dc9b733d1f3006a4dc81d8a2fec255d2a0a0f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49088 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* mb/**/cmos.layout: Indent everything with tabsAngel Pons2020-11-231-35/+35
| | | | | | | | | | Time has shown that using spaces never converges into proper alignment. Change-Id: I5338aeaf139580f9eab3e1e02cb910080a95d2c2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47147 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
* {src/mb,util/autoport}: Use macro for DSDT revisionElyes HAOUAS2020-10-131-1/+1
| | | | | | | | Change-Id: I5a5f4e7067948c5cc7a715a08f7a5a3e9b391191 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45904 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
* mb/biostar: Drop unneeded empty linesElyes HAOUAS2020-08-311-1/+0
| | | | | | | | Change-Id: I4c7f23615bcfd9c2bda2cac8808544b98f8e25a2 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44615 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* mb/biostar: Add TH61-ITX portMate Kukri2020-07-2117-0/+506
- CPU: only tested with a Xeon E3-1220 (Sandy Bridge) - RAM: native raminit tested (4G+4G, 8G+8G) - USB: both chipset and ASMedia USB3 work, tested in SeaBIOS and Linux (5.4) - LAN: tested in Linux - SATA: all 4 ports work, tested in SeaBIOS and Linux - iGPU: I can't test it as I only have a Xeon for this socket - PEG: tested with an nVidia GT210, initialized by SeaBIOS - PS2 keyboard and mouse combo port: no devices to test with - Front panel header: tested, works - Audio: tested, works - Diagnostic LEDs: TBD Change-Id: I9fd3c0b148b694fcb8e728cc17f0bd45eb5af9f2 Signed-off-by: Mate Kukri <kukri.mate@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43165 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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