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* mb/google/nissa/var/pujjo: Enable PCIe port 4 for WLANLeo Chou2022-07-271-0/+20
| | | | | | | | | | | | | Pujjo support WLAN device, enable PCIe port 4 for WLAN device BUG=b:239899932 TEST=Build and boot on pujjo Signed-off-by: Leo Chou <leo.chou@lcfc.corp-partner.google.com> Change-Id: Ic8b7240941cf87a4f27963d50fffe28875114a81 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66073 Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/nissa/var/pujjo: Add new supported memory partLeo Chou2022-07-253-0/+3
| | | | | | | | | | | | | | | | | Add pujjo new supported memory parts in mem_parts_used.txt. Generate SPD id for this part. Micron MT62F1G32D4DR-031 WT:B BUG=b:239776504 TEST=Use part_id_gen to generate related settings Signed-off-by: Leo Chou <leo.chou@lcfc.corp-partner.google.com> Change-Id: I95eb194ecbd5d39f66eb566132e75af056899325 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66039 Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
* mb/google/nissa/var/pujjo: Remove unsupport HDA device settingStanley Wu2022-07-151-8/+0
| | | | | | | | | | | | | | Pujjo only support RTL1019 amp device, remove MX98360A device setting BUG=b:238716919 TEST=Build and boot on pujjo Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Change-Id: I92ba66e8656ea36511f88cf867f51ba95168592e Reviewed-on: https://review.coreboot.org/c/coreboot/+/65818 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* mb/google/nissa/var/pujjo: Add WWAN power off sequenceStanley Wu2022-07-141-0/+4
| | | | | | | | | | | | | | pujjo support FM101 WWAN, use wwan_power.asl to handle the power off sequence BUG=b:238281124 TEST=Build and boot on pujjo Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Change-Id: I53cd45c8030855c267d870d68d009c454350621e Reviewed-on: https://review.coreboot.org/c/coreboot/+/65781 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Reka Norman <rekanorman@chromium.org>
* mb/google/nissa/var/pujjo: Add WFC camera settingStanley Wu2022-07-131-0/+1
| | | | | | | | | | | | | Modify USB2.0 port[6] setting for WFC camera support BUG=b:235182560 TEST=Build and boot on pujjo Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Change-Id: I78dad102be2d915a251f6528eef07f2056001b0a Reviewed-on: https://review.coreboot.org/c/coreboot/+/65777 Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/nissa/var/pujjo: Add lock gpio pinsEric Lai2022-07-061-4/+4
| | | | | | | | | | | | | | There is a new ground rule, variant should honor baseboard lock gpios. Thus, lock the gpio which is locked in baseboard. BUG=b:216671701 TEST=build passed. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: I9f0fcf52b6b7d622e4fd182e007de6401856c7fb Reviewed-on: https://review.coreboot.org/c/coreboot/+/65645 Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/brya/var/pujjo: Add GPIO tableleo.chou2022-07-042-0/+77
| | | | | | | | | | | | | Fill GPIO table for Pujjo. BUG=b:235774770 TEST=emerge-nissa coreboot Signed-off-by: leo.chou <leo.chou@lcfc.corp-partner.google.com> Change-Id: I307b8460632f1feae9591200057c0e6471cbab24 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65104 Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/nissa/variant/pujjo: Update devicetree settingsStanley Wu2022-06-291-2/+347
| | | | | | | | | | | | | | Based on schematic and gpio table of pujjo, generate overridetree.cb settings for pujjo. BUG=b:235182560 TEST=FW_NAME=pujjo emerge-nissa coreboot chromeos-bootimage Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Change-Id: I47b10d03798004d1f3e398070acb2cbad46900b7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65260 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Reka Norman <rekanorman@chromium.org>
* mb/google/nissa: Create pujjo variantStanley Wu2022-06-213-0/+22
| | | | | | | | | | | | | | | | | | Create the pujjo variant of the nissa reference board by copying the template files to a new directory named for the variant. (Follow other ADLN variant to generate by manual) BUG=b:235182560 BRANCH=None TEST=util/abuild/abuild -p none -t google/brya -x -a make sure the build includes GOOGLE_PUJJO Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Change-Id: I73ec985bc19320260d0c3132c1ca23a3648df9e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65016 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Reka Norman <rekanorman@chromium.org>
* mb/google/nissa/var/pujjo: Generate SPD ID for supported memory partLeo Chou2022-06-173-0/+36
Add pujjo supported memory parts in mem_parts_used.txt, generate SPD id for this part. 1. Samsung K3LKBKB0BM-MGCP, K3LKCKC0BM-MGCP 2. Hynix H58G56AK6BX069, H9JCNNNBK3MLYR-N6E 3. Micron MT62F512M32D2DR-031 WT:B BUG=b:235765890 TEST=Use part_id_gen to generate related settings Signed-off-by: Leo Chou <leo.chou@lcfc.corp-partner.google.com> Change-Id: I929527a219452082e416803f7a74d470be5a188c Reviewed-on: https://review.coreboot.org/c/coreboot/+/65100 Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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