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* google/trogdor: Enable Parade ps8640 edp bridge for pazquelYunlong Jia2021-12-171-1/+2
| | | | | | | | | | | | BRANCH=none BUG=b:201478528 TEST=build and boot Change-Id: I6130ee00a0e6f469142f5416627e38c7b5076071 Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60130 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* soc/qualcomm/common/usb: Add support for common USB driverSandeep Maheswaram2021-11-292-4/+3
| | | | | | | | | | | | | | | | Add common USB driver for qualcomm soc sc7180 and sc7280. This includes dwc3 controller, qmp ss phy, qusb hs phy and snsp hs phy. BUG=b:182963902 TEST=Validated USB enumeration on qcom sc7180 and sc7280 development board Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> Change-Id: I1013ded22855286220cfa747cb25418070fe85a7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56091 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* mb/google/trogdor: change pin define for quackingstickSheng-Liang Pan2021-11-231-1/+1
| | | | | | | | | | | | | | | change TP_EN pin to GPIO_67 for quackingstick BUG=b:206862167 BRANCH=trogdor TEST=make Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Change-Id: I7cc1083111f46cd3489cbbb9e579c34dc972b0b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59533 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Bob Moragues <moragues@google.com>
* mb/google/trogdor: Adjust mipi panel backlight gpioZanxi Chen2021-11-172-1/+9
| | | | | | | | | | | | | | | | According hareware design, mipi panel backlight relies on AP_BKLTEN(GPIO_12) and TP_EN(GPIO_85). Meanwhile, TP_EN(GPIO_85) needs pull up to enable PP3300_DISP_ON before AP_BKLTEN(GPIO_12) up. BUG=b:197709288,b:199081803,b:205166230 BRANCH=trogdor TEST=emerge-strongbad coreboot Change-Id: Ie9920e5366f6b1ea9e0da228bd211317516b390a Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59044 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"Hsuan-ting Chen2021-11-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit adb393bdd6cd6734fa2672bd174aca4588a68016. This relands commit 6260bf712a836762b18d80082505e981e040f4bc. Reason for revert: The original CL did not handle some devices correctly. With the fixes: * commit 36721a4 (mb/google/brya: Add GPIO_IN_RW to all variants' early GPIO tables) * commit 3bfe46c (mb/google/guybrush: Add GPIO EC in RW to early GPIO tables) * commit 3a30cf9 (mb/google/guybrush: Build chromeos.c in verstage This CL also fix the following platforms: * Change to always trusted: cyan. * Add to early GPIO table: dedede, eve, fizz, glados, hatch, octopus, poppy, reef, volteer. * Add to both Makefile and early GPIO table: zork. For mb/intel: * adlrvp: Add support for get_ec_is_trusted(). * glkrvp: Add support for get_ec_is_trusted() with always trusted. * kblrvp: Add support for get_ec_is_trusted() with always trusted. * kunimitsu: Add support for get_ec_is_trusted() and initialize it as early GPIO. * shadowmountain: Add support for get_ec_is_trusted() and initialize it as early GPIO. * tglrvp: Add support for get_ec_is_trusted() with always trusted. For qemu-q35: Add support for get_ec_is_trusted() with always trusted. We could attempt another land. Change-Id: I66b8b99d6e6bf259b18573f9f6010f9254357bf9 Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58253 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
* mb/google/trogdor: Modify BOE panel_id for mrblandZanxi Chen2021-11-121-3/+5
| | | | | | | | | | | | | | | | | Modify BOE panel_id for mrbland due to hardware changes. BUG=b:205166230,b:198548221 BRANCH=trogdor TEST=emerge-strongbad coreboot Change-Id: I65fecd854c4e3443edc07a44a1d43572d5030e4c Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58995 Reviewed-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com> Reviewed-by: Bob Moragues <moragues@google.com> Reviewed-by: Shelley Chen <shchen@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* google/trogdor: Update the power on sequence of ps8640xuxinxiong2021-11-092-3/+11
| | | | | | | | | | | | | | | | | For the Qualcomm PBL configuration of GPIO, we need to initial the GPIOs for VDD33# and RST# at the beginning of coreboot. According to the pa8640 latest spec v1.4, update the sequence of VDD33# and PD#. BUG=b:204637643 BRANCH=trogdor TEST=verified the waveform of ps8640 at coreboot phase. Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com> Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58994 Reviewed-by: Wentao Qin <qinwentao@huaqin.corp-partner.google.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/trogdor: Mark kingoftown as supporting Parade PS84640Kevin Chiu2021-11-031-1/+2
| | | | | | | | | | | | | BUG=b:204272905 BRANCH=master TEST=emerge-trogdor coreboot Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Change-Id: Ie13ddfef6adfd53adb0a0d3a98995fb00b8a45e6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58789 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philip Chen <philipchen@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
* mb/google/trogdor: determine which panel to use by panel_id for quackingstickSheng-Liang Pan2021-10-211-0/+9
| | | | | | | | | | | | | | | panel_id 6 for AUO B101UAN08.3. BUG=b:201263032 BRANCH=none TEST=make Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Change-Id: I076ded9300c2ec1704a566722870bd0d1a20e9d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58363 Reviewed-by: Bob Moragues <moragues@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* google/trogdor: Support Parade ps8640Philip Chen2021-10-203-10/+63
| | | | | | | | | | | | | | | Support Parade ps8640 as the second source edp bridge for some trogdor board variants/revisions. BUG=b:194741013 BRANCH=trogdor TEST=verified firmware screen works on lazor rev9 Change-Id: Iae5ccd8d9d33d60e4c37011ecffdd7a05af59ab2 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58437 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"Hsuan-ting Chen2021-10-151-6/+0
| | | | | | | | | | | | | | This reverts commit 6260bf712a836762b18d80082505e981e040f4bc. Reason for revert: This CL did not handle Intel GPIO correctly. We need to add GPIO_EC_IN_RW into early_gpio_table for platforms using Intel SoC. Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org> Change-Id: Iaeb1bf598047160f01e33ad0d9d004cad59e3f75 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57951 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/trogdor: Add new vaviant quackingstickSheng-Liang Pan2021-10-042-2/+7
| | | | | | | | | | | | | | New boards introduced to trogdor family. BUG=b:201263032 BRANCH=none TEST=make Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Change-Id: I8299ddda14eb82103f17f8464a14992aa757afa6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58033 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* google/trogdor: Always initialize eDP bridge I2C QUP firmwareJulius Werner2021-09-291-2/+4
| | | | | | | | | | | | | | | | | | | | In CB:52662 when MIPI display support was added, we accidentally changed the code flow for eDP displays such that i2c_init() will no longer be called when display_init_required() is false. This is a problem because on this platform, i2c_init() does not just prepare the I2C controller for firmware use, it also loads firmware to the controller that makes it behave like an I2C device in the first place -- a step that the kernel cannot later do on its own if the firmware didn't already do it. Skipping this initialization means the I2C controller becomes unusable to the kernel. This patch fixes the issue by making the i2c_init() unconditional again. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ie4546c31d87d91113eeef7dc7a18599a87e6d6eb Reviewed-on: https://review.coreboot.org/c/coreboot/+/58026 Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* soc/qualcomm/common/spi: Add support for SPI common driverRavi Kumar Bokka2021-09-211-1/+1
| | | | | | | | | | | | | | This implements qup spi driver for qualcomm chipsets Rename header file names for trogdor to prevent breakage. BUG=b:182963902 TEST=Validated on qualcomm sc7180 and sc7280 development board. Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Change-Id: I2f2b25b6661fcd518f70383da0c7788c5269c97b Reviewed-on: https://review.coreboot.org/c/coreboot/+/55953 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* soc/qualcomm/common/i2c: Add support for I2C common driverRajesh Patil2021-09-211-1/+2
| | | | | | | | | | | | | | | copy existing I2C driver from /soc/qualcomm/sc7180 to common folder. This implements i2c driver for qualcomm chipsets BUG=b:182963902 TEST=Validated on qualcomm sc7180 and sc7280 development board Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Change-Id: I16e6fc2c1c24b9814d1803bffd5cfbb657201cfb Reviewed-on: https://review.coreboot.org/c/coreboot/+/55952 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
* vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_mainHsuan Ting Chen2021-09-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | vboot_reference is introducing a new field (ctx) to store the current boot mode in crrev/c/2944250 (ctx->bootmode), which will be leveraged in both vboot flow and elog_add_boot_reason in coreboot. In current steps of deciding bootmode, a function vb2ex_ec_trusted is required. This function checks gpio EC_IN_RW pin and will return 'trusted' only if EC is not in RW. Therefore, we need to implement similar utilities in coreboot. We will deprecate vb2ex_ec_trusted and use the flag, VB2_CONTEXT_EC_TRUSTED, in vboot, vb2api_fw_phase1 and set that flag in coreboot, verstage_main. Also add a help function get_ec_is_trusted which needed to be implemented per mainboard. BUG=b:177196147, b:181931817 BRANCH=none TEST=Test on trogdor if manual recovery works Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org> Change-Id: I479c8f80e45cc524ba87db4293d19b29bdfa2192 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57048 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mainboard/google: Update the TLMM registers for sdhcShaik Sajida Bhanu2021-09-161-0/+11
| | | | | | | | | | | | | | | Update the TLMM register values for eMMC and SD card on Trogdor, Herobrine and Mistral boards. BUG=b:196936525 TEST=Validated on qualcomm sc7280 and sc7180 development board and checked basic boot up. Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org> Change-Id: Iccdb7757027c6de424a82e4374bad802501ac83c Reviewed-on: https://review.coreboot.org/c/coreboot/+/57450 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/trogdor: Add mipi panel for wormdinglerZanxi Chen2021-09-162-1/+16
| | | | | | | | | | | | | | | | | | | Add mipi panel support for wormdingler - Add the following panel for wormdingler: INX P110ZZD-DF0 BOE TV110C9M-LL0 - Use panel_id to distinguish which mipi panel to use. - Setup panel orientation BUG=b:195898400,b:198548221 BRANCH=none TEST=emerge-strongbad coreboot Change-Id: I8cd28e024ecbfdcd473bc39efb529eb4aca1b5d0 Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57642 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* mb/google: Unify all variants to start with "-> "Martin Roth2021-09-161-1/+1
| | | | | | | | | | | | | | All variants originally had been changed to start with an arrow with two spaces following it to line up with the platform name. A number of recent platforms were added only using a single space. This change updates them all to have two spaces so they line up again. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Iab9e6207fff5a7d2f6d76e5ca33eeaca721a224f Reviewed-on: https://review.coreboot.org/c/coreboot/+/57391 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* soc/qualcomm/common/qup: Add support for QUP common driverRavi Kumar Bokka2021-09-161-1/+2
| | | | | | | | | | | | | | | | copy existing QUP driver from /soc/qualcomm/sc7180 to common folder. This QUP common driver provide QUP configurations, GPI and SE firmware loading and initializations. BUG=b:182963902 TEST=Validated on qualcomm sc7180 and sc7280 development board. Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Change-Id: I95a0fcf97b3b3a6ed26e62b3084feb4a2369cdc9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55951 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
* google/trogdor: Fix Mrbland panels to point LEFT_UPJulius Werner2021-09-151-4/+9
| | | | | | | | | | | | | | CB:57324 moved panel orientation from panel_serializable_data to the responsibility of the mainboard, but in parallel to that patch we landed support for some new panels on the Trogdor mainboard that should be pointing LEFT_UP. This patch fixes up the panel orientation for those. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I416b6c8804a88b36f723c4690ed78aff928a0f8d Reviewed-on: https://review.coreboot.org/c/coreboot/+/57649 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Bob Moragues <moragues@google.com>
* google/trogdor: add new variant kingoftownKevin Chiu2021-09-152-0/+5
| | | | | | | | | | | | | | | | | This patch adds a new variant called kingoftown. it's clamshell only, no FPR, eDP panel. BUG=b:198365759 BRANCH=master TEST=make Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Change-Id: I648664c50dfad11530a854f574f39264158b44e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57433 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bob Moragues <moragues@google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* mb/google/trogdor: Add PANEL_ID to SKU_IDZanxi Chen2021-09-131-0/+10
| | | | | | | | | | | | | | | | | In order to distinguish which mipi panel to use, it need to read the PANEL_ID, and combine the PANEL_ID and SKU_ID into a new SKU_ID. BUG=b:197708579,b:191574572,b:198548221 TEST=PANEL_ID should be set correctly. BRANCH=none Change-Id: I018b3f460f9d084d1a3f0dac026f1cd9dde284e2 Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57329 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bob Moragues <moragues@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
* mb/google/trogdor: Add mipi panel for mrblandZanxi Chen2021-09-114-6/+68
| | | | | | | | | | | | | | | | | | | | Add mipi panel support for mrbland - Setup gpio and modify LCD sequence. - Use the following panel for mrbland: AUO B101UAN08.3 BOE TV101WUM-N53 - Use panel_id to distinguish which mipi panel to use. BUG=b:195516474,b:197300875,b:197300876 BRANCH=none TEST=emerge-strongbad coreboot Change-Id: Ib7cd2da429b114bf6bad5af312044a0f01319b46 Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57336 Reviewed-by: Bob Moragues <moragues@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/mipi: Make orientation a property of the mainboard, not panelJulius Werner2021-09-021-10/+5
| | | | | | | | | | | | | | | | | It doesn't make sense to store the orientation field directly in the panel information structure, which is supposed to be reuseable between different boards. The thing that determines orientation is how that panel is built into the board in question, which only the board itself can know. The same portrait panel could be rotated left to be used as landscape in one board and rotated right to be used as landscape in another. This patch moves the orientation field out of the panel structure back into the mainboards to reflect this. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: If2b716aa4dae036515730c12961fdd8a9ac34753 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57324 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* device/mipi: Move to drivers/mipiJulius Werner2021-08-261-1/+1
| | | | | | | | | | | | | | Sounds like we prefer to have this under drivers/ instead of device/. Also move all MIPI-related headers out from device/ into their own directory. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ib3e66954b8f0cf85b28d8d186b09d7846707559d Reviewed-on: https://review.coreboot.org/c/coreboot/+/57128 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* qualcomm/sc7180: Switch to common MIPI panel libraryJulius Werner2021-08-204-78/+58
| | | | | | | | | | | | | | | | | | | | | | This patch changes the sc7180 boards to use the new common MIPI panel framework, which allows more flexible initialization command packing and sharing panel definitions between boards. (I'm taking the lane count control back out again for now, since it seems we only ever want 4 for now anyway, and if we ever have a need for a different lane count it's not clear whether that should be a property of the board or the panel or both. Better to leave that decision until we have a real use case.) Also, the code was not written to deal with DCS commands that were not a length divisible by 4 (it would read over the end of the command buffer). The corresponding kernel driver seems to pad the command with 0xff instead, let's do the same here. (Also increase the maximum allowed command length to 256 bytes, as per Qualcomm's recommendation.) Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I78f6efbaa9da88a3574d5c6a51061e308412340e Reviewed-on: https://review.coreboot.org/c/coreboot/+/56966 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* google/trogdor: Read SKU ID as binary-first base3 strappingJulius Werner2021-08-191-2/+2
| | | | | | | | | | | We're running out of SKU IDs in the base2 system, so convert it to binary-first base3. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ia7f749fa042d3eac76bfe1e74531905c6e279ad2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57004 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* trogdor: Fix "TPM interrupt" lb_gpio to be ACTIVE_HIGHJulius Werner2021-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | "Latched" GPIOs like this one are a virtual representation of the pending interrupt flag for the edge-triggered pin and not a direct representation of line state, so they should always be marked ACTIVE_HIGH or depthcharge will incorrectly negate them. This has always been wrong and meant that depthcharge doesn't correctly wait for Cr50 flow control responses on these platforms. Thankfully it doesn't seem like we've seen any practical issues from this, but it's still very wrong. BRANCH=trogdor BUG=none TEST=Booted CoachZ (no visible difference) Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ie1586b0e10b64df0712e28552411c4d540a7e457 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56901 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* mb/google/trogdor: Add new variant WormdinglerZanxi Chen2021-08-122-0/+5
| | | | | | | | | | | | | | New board introduced to trogdor family. BUG=b:193870279 BRANCH=none TEST=make Change-Id: If3d9662e8725e30e1308d77b05545efbee29f846 Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56384 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* sc7180: Add display support for mipi panelsVinod Polimera2021-08-034-12/+76
| | | | | | | | | | | | | | - configure TROGDOR_HAS_MIPI_PANEL to "n" by default, it can be updated for mipi panels. - add simple rm69299 panel as an example to append new mipi panels. - use existing edid struct to update mipi panel parameters. - add dsi command tx interface for mipi panel on commands. Change-Id: Id698265a4e2399ad1c26e026e9a5f8ecd305467f Signed-off-by: Vinod Polimera <vpolimer@codeaurora.org> Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52662 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/*: Specify type of `MAINBOARD_PART_NUMBER` onceAngel Pons2021-07-261-1/+0
| | | | | | | | | | | | | | | | Specify the type of the `MAINBOARD_PART_NUMBER` Kconfig symbol once instead of doing so on each and every mainboard. Change-Id: I3692f9e82fe90af4d0da1d037018a20aa1b45793 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56554 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/*: Specify type of `MAINBOARD_DIR` onceAngel Pons2021-07-261-1/+0
| | | | | | | | | | | | | | | | Specify the type of the `MAINBOARD_DIR` Kconfig symbol once instead of doing so on each and every mainboard. Change-Id: If1cc538b0c4938dac193699897b690e402b3c1e8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56553 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* google/trogdor: Enable SPI_FLASH_MACRONIXJulius Werner2021-07-151-1/+2
| | | | | | | | | | We may want to use that flash vendor on future variants. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I2c0fa87fd3f8de8f928e5f41eae2a78204597b5f Reviewed-on: https://review.coreboot.org/c/coreboot/+/56288 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* mb/google/trogdor: Add new vaviant mrblandZanxi Chen2021-06-242-0/+5
| | | | | | | | | | | | | | New boards introduced to trogdor family. BUG=b:191800434 BRANCH=none TEST=make Change-Id: I93b74e79188bd0cc36c8b48e552230ae0d6f593a Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* google/trogdor: change board ID detect to tristate solution.Sheng-Liang Pan2021-06-181-1/+1
| | | | | | | | | | | | | | change binary board ID to tri-state mode. BUG=b:190250108 BRANCH=None TEST=emerge-trogdor coreboot Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Change-Id: I79d1212abc227341be126969ef32e76a635cbdaf Reviewed-on: https://review.coreboot.org/c/coreboot/+/55563 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* google/trogdor: Add new variant PazquelYunlong Jia2021-06-082-0/+5
| | | | | | | | | | | | | | This patch adds a new variant called Pazquel that is identical to Lazor for now. BUG=b:187232137 TEST=make Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> Change-Id: Ib531ea5df19fe91e619f23baada73842554538ad Reviewed-on: https://review.coreboot.org/c/coreboot/+/55268 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* trogdor: Add backlight support for sn65dsi86bridge for HomestarVinod Polimera2021-05-082-0/+8
| | | | | | | | | | | | Add backlight support in sn65dsi86bridge through the AUX channel using eDP DPCD registers, which is needed on the GOOGLE_HOMESTAR board. Change-Id: Ie700080f1feabe2d3397c38088a64cff27bfbe55 Signed-off-by: Vinod Polimera <vpolimer@codeaurora.org> Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52663 Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* google/trogdor: Don't build for rev0 by defaultJulius Werner2021-04-011-1/+0
| | | | | | | | | | | | We've mostly stopped using Trogdor-rev0 now and are starting to bring up rev2 instead. Therefore, the default revisions this builds for should be the newer ones. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ie433ebb2a03fb1636b5012b4a0567ba6f982579d Reviewed-on: https://review.coreboot.org/c/coreboot/+/52007 Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* google/trogdor: Add new variant MarzipanKevin Chiu2021-03-202-0/+6
| | | | | | | | | | | | | | | This patch adds a new variant called Marzipan that is identical to Lazor for now. BUG=b:182181519,b:182018606 BRANCH=master TEST=make Change-Id: I92b667c63b0a06255d1e9511d7486293d8b4426a Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51618 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* mb/google/trogdor: Add support for SPI_FLASH_GIGADEVICExuxinxiong2021-03-201-0/+1
| | | | | | | | | | | | | | Add support SPI_FLASH_GIGADEVICE for some project. BUG=b:182246432 BRANCH=trogdor TEST=emerge-strongbad and test with power on. Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com> Change-Id: I6ab948909f4e17b4b992be6d699646f7a62bef7d Reviewed-on: https://review.coreboot.org/c/coreboot/+/51424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* google/trogdor: Fix trogdor-rev1 eDP power GPIOJulius Werner2021-03-021-1/+2
| | | | | | | | | | | | | Looks like I forgot about trogdor-rev1 in CB:51004. Unlike rev0 (other special case) or rev2 (works like CoachZ/Homestar), rev1 used the same pin as Lazor and Pompom for EN_PP3300_DX_EDP. Apparently there are still some people using these, so add in another special case for that. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I7093aa63778d69fde240af3b0c62b97ac99c28dc Reviewed-on: https://review.coreboot.org/c/coreboot/+/51196 Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/trogdor: Add new configs homestarxuxinxiong2021-02-263-2/+8
| | | | | | | | | | | | | | New boards introduced to trogodor family. BUG=b:180668002 BRANCH=none TEST=make Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com> Change-Id: If0f9b6c89198a882acae7191d08b166eb8c1dd71 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* mb/: Drop the provided name in chip_opsKyösti Mälkki2021-02-211-1/+0
| | | | | | | | | | | Little point to replicate a string already provided both as a global Kconfig and global mainboard_part_number. Change-Id: I1fd138c711ebbb37c39b2c8f554b1f2e1a364424 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50719 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ron minnich <rminnich@gmail.com>
* trogdor: Add fingerprint power sequencingJulius Werner2021-02-125-0/+38
| | | | | | | | | | | | | | | | | | | | | Some Trogdor variants will include a fingerprint sensor, so this patch adds support for its power sequencing. There is a requirement that the fingerprint power needs to be *off* for at least 200ms, and when it is turned back on it needs to stabilize for at least 3.5ms before taking the FPMCU out of reset. We meet these timing requirements by splitting the sequence across bootblock, romstage and ramstage. On current Trogdor boards we measured <end of bootblock> to <end of romstage> at ~430ms and <end of romstage> to <start of ramstage> at 12ms, so we easily meet the required numbers this way. BRANCH=trogdor BUG=b:170284663 Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Iccd77e6e1c378110fca2b2b7ff1f534fce54f8ea Reviewed-on: https://review.coreboot.org/c/coreboot/+/50504 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
* trogdor: Explicitly initialize display pins in bootblockJulius Werner2021-01-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds explicit initializations for the remaining named display (power) control GPIOs to the bootblock GPIO init code. These pins are usually mapped to pins that are already configured to pull-downs on power-on reset so this wasn't really required, but we have already moved them around so often that you never know when EEs might one day move them to a pin with a different power-on reset configuration, so it's better to be explicit. In one particular case, GPIO(67) (used by CoachZ rev1+ but not by anything else for the EN_PP3300_DX_EDP pin) is not actually a pull-down on boot, even though that is claimed by the datasheet. This is likely due to the fact that it can serve as the SPI_HOLD pin for the boot flash QSPI bus, so even though our board's boot flash doesn't really use that pin, it seems that the boot ROM still configures it as such. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I533baa962d2dfc87cfa510f442ed2e8912e0e5b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49810 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: mturney mturney <mturney@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* trogdor: Initialize BACKLIGHT_ENABLE to 0, only turn it on in payloadJulius Werner2021-01-192-3/+3
| | | | | | | | | | | | | | | | | | | The BACKLIGHT_ENABLE pin on this board unfortunately defaults to a pull-up on power on, meaning the backlight is immediately enabled. Best we can do about that is to turn it off again early and wait until it is actually correct in the panel power sequence to turn it back on. Some panels want an explicit 80ms delay after training the eDP connection before the backlight is turned on (this is probably just to avoid temporary display artifacts, but whatever). We don't want to busy-wait that extra time, so instead just delegate turning on that GPIO to the payload (which is also in charge of the backlight PWM already). Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Id8dafbdcb40175fbc9205276eee698583b971873 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49495 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* drivers: Replace set_vbe_mode_info_validPatrick Rudolph2020-12-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | Currently it's not possible to add multiple graphics driver into one coreboot image. This patch series will fix this issue by providing a single API that multiple graphics driver can use. This is required for platforms that have two graphic cards, but different graphic drivers, like Intel+Aspeed on server platforms or Intel+Nvidia on consumer notebooks. The goal is to remove duplicated fill_fb_framebuffer(), the advertisment of multiple indepent framebuffers in coreboot tables, and better runtime/build time graphic configuration options. Replace set_vbe_mode_info_valid with fb_add_framebuffer_info or fb_new_framebuffer_info_from_edid. Change-Id: I95d1d62385a201c68c6c2527c023ad2292a235c5 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
* Coachz: change EN_PP3300_DX_EDP from gpio52 to gpio67yuanliding2020-12-041-1/+2
| | | | | | | | | | | | | | | | Coachz rev1 has changed EN_PP3300_DX_EDP from gpio52 to gpio67. BRANCH=none BUG=b:174123578 TEST=emerge-strongbad coreboot chromeos-bootimage. flash coreboot and boot up normally. Signed-off-by: yuanliding <yuanliding@huaqin.corp-partner.google.com> Change-Id: I32a721d0d725bf217debe35a5cdc01aa8f5d5daf Reviewed-on: https://review.coreboot.org/c/coreboot/+/48224 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
* src: Add missing 'include <console/console.h>'Elyes HAOUAS2020-11-171-0/+1
| | | | | | | | | | "printk()" needs <console/console.h>. Change-Id: Iac6b7000bcd8b1335fa3a0ba462a63aed2dc85b8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45539 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-16 17:46:29 +0000